FranLMSP
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33b852d8d4
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last instructions
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2023-12-30 11:35:20 -05:00 |
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FranLMSP
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19eeff1291
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more transfer instructions
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2023-12-30 11:18:41 -05:00 |
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FranLMSP
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09a649c631
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tcd, tcs and tdc
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2023-12-30 10:32:11 -05:00 |
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FranLMSP
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124f145a44
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tax and tay
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2023-12-30 10:20:05 -05:00 |
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FranLMSP
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877b08fa26
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stz
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2023-12-30 10:05:22 -05:00 |
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FranLMSP
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de2e6fb6a5
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stp
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2023-12-30 10:01:02 -05:00 |
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FranLMSP
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a68ca8d574
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st instructions
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2023-12-30 09:57:02 -05:00 |
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FranLMSP
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0e8775ad6f
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set instructions
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2023-12-30 09:23:49 -05:00 |
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FranLMSP
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c620361b7a
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sbc
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2023-12-30 09:13:18 -05:00 |
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FranLMSP
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0150d0ef7b
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rol, ror, rti, rtl, and rts instructions
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2023-12-30 08:42:47 -05:00 |
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FranLMSP
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0eaf1ff0d6
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rep
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2023-12-29 23:38:57 -05:00 |
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FranLMSP
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88a47a2917
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pull and push instructions
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2023-12-29 23:26:37 -05:00 |
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FranLMSP
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a71999ab68
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mvn and mvp
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2023-12-28 23:02:32 -05:00 |
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FranLMSP
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561207a299
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lsr
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2023-12-28 22:45:28 -05:00 |
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FranLMSP
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10f93ce3dd
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lda, ldx and ldy
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2023-12-28 22:25:03 -05:00 |
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FranLMSP
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55fa2a5406
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lda
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2023-12-28 22:04:20 -05:00 |
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FranLMSP
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a21b0501f3
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jmp and jsr
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2023-12-28 21:52:46 -05:00 |
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FranLMSP
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822cbc14ca
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inc
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2023-12-28 21:13:06 -05:00 |
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FranLMSP
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b65300792e
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eor
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2023-12-28 21:01:33 -05:00 |
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FranLMSP
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3615799e83
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dec instrs
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2023-12-28 20:52:58 -05:00 |
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FranLMSP
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515ff799c8
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cpx and cpy
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2023-12-28 19:51:25 -05:00 |
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FranLMSP
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8c25e202e8
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cop
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2023-12-27 22:19:05 -05:00 |
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FranLMSP
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986a831301
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cmp
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2023-12-27 22:07:55 -05:00 |
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FranLMSP
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a15088a0da
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clear instructions
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2023-12-27 21:55:35 -05:00 |
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FranLMSP
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fa4fa2134b
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bit
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2023-12-27 21:43:29 -05:00 |
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FranLMSP
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c0d534ed4e
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some branch instructions
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2023-12-27 21:21:05 -05:00 |
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FranLMSP
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774010bcf7
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bne
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2023-12-26 22:57:23 -05:00 |
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FranLMSP
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cc127890d1
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beq
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2023-12-26 22:52:39 -05:00 |
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FranLMSP
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fa791db025
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bcs
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2023-12-26 22:47:22 -05:00 |
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FranLMSP
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972f3fe279
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bcc
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2023-12-26 22:43:16 -05:00 |
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FranLMSP
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00e87de9fe
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common decoding module
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2023-12-26 22:27:32 -05:00 |
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FranLMSP
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a1aeda38f5
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asl
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2023-12-26 20:24:47 -05:00 |
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FranLMSP
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826ff5480a
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and
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2023-12-26 19:41:28 -05:00 |
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FranLMSP
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2416e85b6b
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adc instruction
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2023-12-26 19:24:34 -05:00 |
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FranLMSP
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2e4dd7b15c
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decouple cycle increment logic from cpu struct (#1)
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2023-12-26 03:42:07 +00:00 |
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FranLMSP
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28784f47d3
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refactor DMA ticking, cpuadc chars are now visible through debug window
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2023-10-07 23:33:35 -05:00 |
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FranLMSP
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7769964cf6
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WIP DMA transfer logic
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2023-10-07 15:32:55 -05:00 |
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FranLMSP
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e701274cdb
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Small readability refactor
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2023-10-07 11:21:37 -05:00 |
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FranLMSP
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7bdd9ab285
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fix tests
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2023-10-06 23:14:55 -05:00 |
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FranLMSP
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5c8bd6afca
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fix ldx and stx instructions and small refactor to vram
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2023-10-06 23:08:03 -05:00 |
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FranLMSP
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8f05a21ebc
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Fix bugs with emulation mode flag
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2023-10-05 16:21:33 -05:00 |
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FranLMSP
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967cf77cc2
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fix vblank nmi register and address mapping
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2023-07-09 16:14:51 -05:00 |
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FranLMSP
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ea7fb8ce65
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define all ppu registers
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2023-07-09 14:03:59 -05:00 |
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FranLMSP
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85f41b872d
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refactor frame loop
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2023-07-09 12:40:52 -05:00 |
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FranLMSP
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a68a4b1764
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Adjustments to make emu core run faster when not paused
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2023-07-08 23:44:24 -05:00 |
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FranLMSP
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3e32e9d606
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display PPU registers and VRAM debug info
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2023-07-07 21:58:15 -05:00 |
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FranLMSP
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e6d97f7203
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read_external function
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2023-07-07 19:13:31 -05:00 |
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FranLMSP
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e7a40db745
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vram writes, reads, auto increments and clear vblank nmi flag when read
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2023-07-05 23:13:14 -05:00 |
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FranLMSP
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a82c554b25
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WIP VRAM writes
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2023-07-05 21:47:43 -05:00 |
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FranLMSP
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98861336d1
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functions to get background char and tile addresses
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2023-07-04 22:22:43 -05:00 |
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