fix vblank nmi register and address mapping

This commit is contained in:
2023-07-09 16:14:51 -05:00
parent ea7fb8ce65
commit 967cf77cc2
4 changed files with 23 additions and 11 deletions
+1 -1
View File
@@ -49,7 +49,7 @@ impl Bus {
0x0000..=0x1FFF => MemoryMap::WRAM,
0x2100..=0x21FF => MemoryMap::PPU,
0x4016..=0x4017 => MemoryMap::Joypad,
0x4200..=0x420F => MemoryMap::CPU,
0x4200..=0x42FF => MemoryMap::CPU,
_ => MemoryMap::Cartridge,
},
_ => MemoryMap::Cartridge,
+14 -3
View File
@@ -16,12 +16,23 @@ impl InternalRegisters {
}
}
fn get_index(address: u16) -> usize {
(address - INTERNAL_REGISTERS_ADDRESS) as usize
}
fn _read(&self, address: u16) -> u8 {
self.registers[(address - INTERNAL_REGISTERS_ADDRESS) as usize]
let index = InternalRegisters::get_index(address);
if index >= self.registers.len() {
return 0xFF;
}
self.registers[index]
}
fn _write(&mut self, address: u16, value: u8) {
self.registers[(address - INTERNAL_REGISTERS_ADDRESS) as usize] = value
let index = InternalRegisters::get_index(address);
if index < self.registers.len() {
self.registers[index] = value
}
}
pub fn read_external(&self, address: u16, ppu_registers: &PPURegisters) -> u8 {
@@ -73,7 +84,7 @@ mod ppu_general_test {
ppu.registers.h_count = 339;
ppu.registers.v_count = 224;
ppu.dot_cycle();
assert_eq!(registers.read_vblank_nmi(&mut ppu.registers), 0x80);
assert_eq!(registers.read_vblank_nmi_mut(&mut ppu.registers), 0x80);
// vblank bit is reset after read
ppu.dot_cycle();
assert_eq!(registers.read_vblank_nmi(&mut ppu.registers), 0x00);
+7 -7
View File
@@ -378,7 +378,7 @@ impl PPURegisters {
}
pub fn is_vblanking(&self) -> bool {
if self.h_count >= 1 && self.h_count <= 224 {
if self.v_count >= 1 && self.v_count <= 224 {
return false
}
return true
@@ -577,17 +577,17 @@ mod ppu_registers_test {
#[test]
fn test_is_vblanking() {
let mut registers = PPURegisters::new();
registers.h_count = 339;
registers.v_count = 339;
assert_eq!(registers.is_vblanking(), true);
registers.h_count = 0;
registers.v_count = 0;
assert_eq!(registers.is_vblanking(), true);
registers.h_count = 225;
registers.v_count = 225;
assert_eq!(registers.is_vblanking(), true);
registers.h_count = 224;
registers.v_count = 224;
assert_eq!(registers.is_vblanking(), false);
registers.h_count = 2;
registers.v_count = 2;
assert_eq!(registers.is_vblanking(), false);
registers.h_count = 50;
registers.v_count = 50;
assert_eq!(registers.is_vblanking(), false);
}
}