fix ldx and stx instructions and small refactor to vram

This commit is contained in:
2023-10-06 23:08:03 -05:00
parent 8f05a21ebc
commit 5c8bd6afca
3 changed files with 16 additions and 15 deletions

View File

@@ -859,7 +859,7 @@ impl CPU {
}
fn stx(&mut self, bus: &mut Bus, addressing_mode: AddressingMode) {
if self.registers.is_16bit_mode() {
if self.registers.is_16bit_index() {
self.set_16bit_to_address(bus, addressing_mode, self.registers.x);
} else {
self.set_8bit_to_address(bus, addressing_mode, self.registers.x as u8);
@@ -868,7 +868,7 @@ impl CPU {
}
fn sty(&mut self, bus: &mut Bus, addressing_mode: AddressingMode) {
if self.registers.is_16bit_mode() {
if self.registers.is_16bit_index() {
self.set_16bit_to_address(bus, addressing_mode, self.registers.y);
} else {
self.set_8bit_to_address(bus, addressing_mode, self.registers.y as u8);

View File

@@ -146,7 +146,7 @@ pub enum Background {
pub struct PPURegisters {
data: [u8; 64],
vram: [u8; 0x10000],
vram: [u16; 0x10000],
pub vblank_nmi: bool,
pub h_count: u16,
pub v_count: u16,
@@ -167,7 +167,7 @@ impl PPURegisters {
&self.data
}
pub fn vram(&self) -> &[u8] {
pub fn vram(&self) -> &[u16] {
&self.vram
}
@@ -215,14 +215,14 @@ impl PPURegisters {
}
fn handle_write_vram(&mut self, byte_lo: Option<u8>, byte_hi: Option<u8>) {
let address = ((self.read(VMADDH) as u16) << 8) | (self.read(VMADDL) as u16);
let effective_address = (address & 0x7FFF) * 2;
let address = (((self.read(VMADDH) as u16) << 8) | (self.read(VMADDL) as u16)) & 0x7FFF;
let current_word = self.vram[address as usize];
if let Some(byte) = byte_lo {
self.vram[effective_address.wrapping_add(1) as usize] = byte;
self.vram[address as usize] = (current_word & 0xFF00) | (byte as u16);
self._write(RDVRAML, byte);
}
if let Some(byte) = byte_hi {
self.vram[effective_address as usize] = byte;
self.vram[address as usize] = (current_word & 0x00FF) | ((byte as u16) << 8);
self._write(RDVRAMH, byte);
}
self.handle_vram_addr_auto_increment(byte_lo, byte_hi);

View File

@@ -70,14 +70,15 @@ fn render_background_char_2bpp(bgdebug: &mut BgDebug, registers: &PPURegisters)
let current_char_row = y.rem_euclid(8);
// 8x8 pixels, 2 bitplanes, each word (16bit) holds 8 pixels
// so 1 char is 8 bytes x 2
let char_base_vram_address = current_char * 8 * 2;
let char_base_vram_address = current_char * 8;
let effective_vram_address = vram_base_address + (
char_base_vram_address + (current_char_row * 2)
char_base_vram_address + (current_char_row)
);
let current_pixel = x + (y * width);
let lsb_bitplane= vram[effective_vram_address];
let msb_bitplane= vram[effective_vram_address + 1];
let vram_word = vram[effective_vram_address];
let lsb_bitplane= vram_word as u8;
let msb_bitplane= (vram_word >> 8) as u8;
let pixels = [
(
(lsb_bitplane >> 7) |
@@ -296,12 +297,12 @@ pub fn vram_window(ppu_registers: &PPURegisters, vram_debug: &mut VRAMMap, show_
let address_end = vram_debug.address_end;
let mut header = String::from(" | ");
for page in 0x00..=0x0F {
header = format!("{}{:02X} ", header, page);
header = format!("{} {:02X} ", header, page);
}
ui.text(header);
let mut divider = String::from("-----|-");
for _ in 0x00..=0x0F {
divider = format!("{}---", divider);
divider = format!("{}-----", divider);
}
ui.text(divider);
let vector = (address_start..=address_end).collect::<Vec<u16>>();
@@ -309,7 +310,7 @@ pub fn vram_window(ppu_registers: &PPURegisters, vram_debug: &mut VRAMMap, show_
for row in chunks {
let mut address_row = format!("{:04X} | ", row[0]);
for address in row {
address_row = format!("{}{:02X} ", address_row, ppu_registers.vram()[(*address) as usize]);
address_row = format!("{}{:04X} ", address_row, ppu_registers.vram()[(*address) as usize]);
}
ui.text(address_row);
}