mirror of
https://github.com/FranLMSP/snes.git
synced 2026-08-03 08:30:01 -04:00
dec instrs
This commit is contained in:
@@ -0,0 +1,91 @@
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use crate::{cpu::{bus::Bus, registers::Registers}, utils::addressing::AddressingMode};
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use crate::cpu::cycles;
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use super::{CPUInstruction, Decode, write_8bit_to_address, write_16bit_to_address, read_8bit_from_address, read_16bit_from_address, dec_common};
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use super::decoder_common;
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static INSTR_NAME: &'static str = "DEC";
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pub struct DEC8 {
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addressing_mode: AddressingMode,
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}
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impl CPUInstruction for DEC8 {
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fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
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let result = dec_common::do_dec(
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registers,
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read_8bit_from_address(registers, bus, self.addressing_mode),
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) as u8;
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write_8bit_to_address(registers, bus, self.addressing_mode, result);
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let (bytes, cycles) = cycles::increment_cycles_inc_dec(®isters, self.addressing_mode);
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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impl Decode for DEC8 {
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fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
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decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
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}
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}
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pub struct DEC16 {
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addressing_mode: AddressingMode,
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}
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impl CPUInstruction for DEC16 {
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fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
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let result = dec_common::do_dec(
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registers,
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read_16bit_from_address(registers, bus, self.addressing_mode),
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) as u16;
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write_16bit_to_address(registers, bus, self.addressing_mode, result);
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let (bytes, cycles) = cycles::increment_cycles_inc_dec(®isters, self.addressing_mode);
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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impl Decode for DEC16 {
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fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
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decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
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}
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}
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#[cfg(test)]
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mod cpu_instructions_tests {
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use super::*;
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#[test]
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fn test_8bit() {
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let mut registers = Registers::new();
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let mut bus = Bus::new();
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registers.a = 0x0001;
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registers.pbr = 0x00;
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registers.pc = 0x0000;
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registers.set_memory_select_flag(true);
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let instruction = DEC8{addressing_mode: AddressingMode::Accumulator};
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.a, 0);
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assert_eq!(registers.pc, 0x01);
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assert_eq!(registers.cycles, 2);
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assert!(!registers.get_negative_flag());
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assert!(registers.get_zero_flag());
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}
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#[test]
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fn test_16bit() {
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let mut registers = Registers::new();
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let mut bus = Bus::new();
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registers.a = 0x0001;
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registers.pbr = 0x00;
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registers.pc = 0x0000;
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registers.set_memory_select_flag(true);
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let instruction = DEC16{addressing_mode: AddressingMode::Accumulator};
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.a, 0);
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assert_eq!(registers.pc, 0x01);
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assert_eq!(registers.cycles, 2);
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assert!(!registers.get_negative_flag());
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assert!(registers.get_zero_flag());
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}
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}
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@@ -0,0 +1,12 @@
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use crate::{cpu::registers::Registers, utils::{num_trait::SnesNum, alu}, common::flags::Flags};
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pub fn do_dec<T: SnesNum>(registers: &mut Registers, target: T) -> T {
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let (result, affected_flags) = alu::sbc_bin(target, T::from_u32(1), false);
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for flag in affected_flags {
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match flag {
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Flags::Negative(_) | Flags::Zero(_) => registers.set_flags(&[flag]),
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_ => {},
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}
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}
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result
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}
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@@ -0,0 +1,85 @@
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use crate::cpu::{bus::Bus, registers::Registers};
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use crate::cpu::cycles;
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use super::{CPUInstruction, Decode, dec_common};
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use super::decoder_common;
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static INSTR_NAME: &'static str = "DEX";
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pub struct DEX8 {}
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impl CPUInstruction for DEX8 {
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fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
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let result = dec_common::do_dec(
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registers,
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registers.x,
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) as u8;
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registers.set_low_x(result);
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let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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impl Decode for DEX8 {
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fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
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decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
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}
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}
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pub struct DEX16 {}
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impl CPUInstruction for DEX16 {
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fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
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let result = dec_common::do_dec(
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registers,
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registers.x,
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) as u16;
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registers.x = result;
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let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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impl Decode for DEX16 {
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fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
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decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
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}
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}
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#[cfg(test)]
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mod cpu_instructions_tests {
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use super::*;
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#[test]
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fn test_8bit() {
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let mut registers = Registers::new();
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let mut bus = Bus::new();
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registers.x = 0x0001;
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registers.pbr = 0x00;
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registers.pc = 0x0000;
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let instruction = DEX8{};
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.x, 0);
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assert_eq!(registers.pc, 0x01);
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assert_eq!(registers.cycles, 2);
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assert!(!registers.get_negative_flag());
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assert!(registers.get_zero_flag());
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}
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#[test]
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fn test_16bit() {
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let mut registers = Registers::new();
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let mut bus = Bus::new();
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registers.x = 0x0001;
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registers.pbr = 0x00;
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registers.pc = 0x0000;
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let instruction = DEX16{};
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.x, 0);
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assert_eq!(registers.pc, 0x01);
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assert_eq!(registers.cycles, 2);
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assert!(!registers.get_negative_flag());
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assert!(registers.get_zero_flag());
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}
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}
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@@ -0,0 +1,85 @@
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use crate::cpu::{bus::Bus, registers::Registers};
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use crate::cpu::cycles;
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use super::{CPUInstruction, Decode, dec_common};
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use super::decoder_common;
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static INSTR_NAME: &'static str = "DEY";
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pub struct DEY8 {}
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impl CPUInstruction for DEY8 {
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fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
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let result = dec_common::do_dec(
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registers,
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registers.y,
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) as u8;
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registers.set_low_y(result);
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let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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impl Decode for DEY8 {
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fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
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decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
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}
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}
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pub struct DEY16 {}
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impl CPUInstruction for DEY16 {
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fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
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let result = dec_common::do_dec(
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registers,
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registers.y,
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) as u16;
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registers.y = result;
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let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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impl Decode for DEY16 {
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fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
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decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
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}
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}
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#[cfg(test)]
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mod cpu_instructions_tests {
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use super::*;
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#[test]
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fn test_8bit() {
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let mut registers = Registers::new();
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let mut bus = Bus::new();
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registers.y = 0x0001;
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registers.pbr = 0x00;
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registers.pc = 0x0000;
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let instruction = DEY8{};
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.y, 0);
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assert_eq!(registers.pc, 0x01);
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assert_eq!(registers.cycles, 2);
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assert!(!registers.get_negative_flag());
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assert!(registers.get_zero_flag());
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}
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#[test]
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fn test_16bit() {
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let mut registers = Registers::new();
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let mut bus = Bus::new();
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registers.y = 0x0001;
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registers.pbr = 0x00;
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registers.pc = 0x0000;
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let instruction = DEY16{};
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.y, 0);
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assert_eq!(registers.pc, 0x01);
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assert_eq!(registers.cycles, 2);
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assert!(!registers.get_negative_flag());
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assert!(registers.get_zero_flag());
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}
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}
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@@ -25,7 +25,11 @@ pub mod cmp;
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pub mod cop;
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pub mod cpx;
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pub mod cpy;
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pub mod dec;
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pub mod dex;
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pub mod dey;
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pub mod bit_common;
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pub mod dec_common;
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pub mod decoder_common;
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pub mod branch_common;
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pub mod push_common;
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@@ -66,3 +70,31 @@ pub fn read_16bit_from_address(registers: &Registers, bus: &mut Bus, addressing_
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)
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}
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}
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pub fn write_8bit_to_address(registers: &mut Registers, bus: &mut Bus, addressing_mode: AddressingMode, value: u8) {
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match addressing_mode {
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AddressingMode::Accumulator => registers.set_low_a(value),
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_ => addressing_mode.store_8bit(
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bus,
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registers.get_pc_address(),
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registers.d,
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registers.sp,
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registers.x, registers.y,
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value,
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),
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};
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}
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pub fn write_16bit_to_address(registers: &mut Registers, bus: &mut Bus, addressing_mode: AddressingMode, value: u16) {
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match addressing_mode {
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AddressingMode::Accumulator => registers.a = value,
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_ => addressing_mode.store_16bit(
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bus,
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registers.get_pc_address(),
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registers.d,
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registers.sp,
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registers.x, registers.y,
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value,
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),
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};
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}
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