mirror of
https://github.com/FranLMSP/snes.git
synced 2026-08-03 08:30:01 -04:00
set instructions
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@@ -65,6 +65,10 @@ pub mod rti;
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pub mod rtl;
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pub mod rts;
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pub mod sbc;
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pub mod sec;
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pub mod sed;
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pub mod sei;
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pub mod sep;
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pub mod bit_common;
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pub mod dec_common;
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pub mod decoder_common;
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@@ -0,0 +1,42 @@
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use crate::cpu::{bus::Bus, registers::Registers};
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use crate::cpu::cycles;
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use super::{CPUInstruction, Decode};
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use super::decoder_common;
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static INSTR_NAME: &'static str = "SEC";
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pub struct SEC {}
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impl CPUInstruction for SEC {
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fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
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registers.set_carry_flag(true);
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let (bytes, cycles) = cycles::increment_cycles_set_flag();
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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impl Decode for SEC {
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fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
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decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
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}
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}
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#[cfg(test)]
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mod cpu_instructions_tests {
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use super::*;
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#[test]
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fn test() {
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let mut registers = Registers::new();
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let mut bus = Bus::new();
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registers.pc = 0x0000;
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registers.set_carry_flag(false);
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let instruction = SEC{};
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.get_carry_flag(), true);
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assert_eq!(registers.pc, 0x0001);
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assert_eq!(registers.cycles, 2);
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}
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}
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@@ -0,0 +1,42 @@
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use crate::cpu::{bus::Bus, registers::Registers};
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use crate::cpu::cycles;
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use super::{CPUInstruction, Decode};
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use super::decoder_common;
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static INSTR_NAME: &'static str = "SED";
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pub struct SED {}
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impl CPUInstruction for SED {
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fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
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registers.set_decimal_mode_flag(true);
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let (bytes, cycles) = cycles::increment_cycles_set_flag();
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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impl Decode for SED {
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fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
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decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
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}
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}
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#[cfg(test)]
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mod cpu_instructions_tests {
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use super::*;
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#[test]
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fn test() {
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let mut registers = Registers::new();
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let mut bus = Bus::new();
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registers.pc = 0x0000;
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registers.set_decimal_mode_flag(false);
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let instruction = SED{};
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.get_decimal_mode_flag(), true);
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assert_eq!(registers.pc, 0x0001);
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assert_eq!(registers.cycles, 2);
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}
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}
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@@ -0,0 +1,42 @@
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use crate::cpu::{bus::Bus, registers::Registers};
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use crate::cpu::cycles;
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use super::{CPUInstruction, Decode};
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use super::decoder_common;
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static INSTR_NAME: &'static str = "SEI";
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pub struct SEI {}
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impl CPUInstruction for SEI {
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fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
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registers.set_irq_disable_flag(true);
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let (bytes, cycles) = cycles::increment_cycles_set_flag();
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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impl Decode for SEI {
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fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
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decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
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}
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}
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#[cfg(test)]
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mod cpu_instructions_tests {
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use super::*;
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#[test]
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fn test() {
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let mut registers = Registers::new();
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let mut bus = Bus::new();
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registers.pc = 0x0000;
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registers.set_irq_disable_flag(false);
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let instruction = SEI{};
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.get_irq_disable_flag(), true);
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assert_eq!(registers.pc, 0x0001);
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assert_eq!(registers.cycles, 2);
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}
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}
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@@ -0,0 +1,45 @@
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use crate::cpu::{bus::Bus, registers::Registers};
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use crate::cpu::cycles;
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use crate::utils::addressing::AddressingMode;
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use super::{CPUInstruction, Decode, read_8bit_from_address};
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use super::decoder_common;
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static INSTR_NAME: &'static str = "SEP";
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pub struct SEP {}
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impl CPUInstruction for SEP {
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fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
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let byte = read_8bit_from_address(registers, bus, AddressingMode::Immediate);
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registers.set_sep_byte(byte);
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let (bytes, cycles) = cycles::increment_cycles_sep();
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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impl Decode for SEP {
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fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
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decoder_common::mnemonic_8bit_immediate(opcode, INSTR_NAME, registers, bus)
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}
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}
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#[cfg(test)]
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mod cpu_instructions_tests {
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use super::*;
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#[test]
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fn test() {
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let mut registers = Registers::new();
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let mut bus = Bus::new();
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registers.pc = 0x0000;
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registers.p = 0x00;
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bus.write(0x0001, 0xFF);
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let instruction = SEP{};
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.p, 0xFF);
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assert_eq!(registers.pc, 0x0002);
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assert_eq!(registers.cycles, 3);
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}
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}
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