From 0e8775ad6f0d45750373afd24e5bcac037fabcd7 Mon Sep 17 00:00:00 2001 From: Franco Colmenarez Date: Sat, 30 Dec 2023 09:23:49 -0500 Subject: [PATCH] set instructions --- snes-core/src/cpu/instructionstemp/mod.rs | 4 ++ snes-core/src/cpu/instructionstemp/sec.rs | 42 +++++++++++++++++++++ snes-core/src/cpu/instructionstemp/sed.rs | 42 +++++++++++++++++++++ snes-core/src/cpu/instructionstemp/sei.rs | 42 +++++++++++++++++++++ snes-core/src/cpu/instructionstemp/sep.rs | 45 +++++++++++++++++++++++ 5 files changed, 175 insertions(+) create mode 100644 snes-core/src/cpu/instructionstemp/sec.rs create mode 100644 snes-core/src/cpu/instructionstemp/sed.rs create mode 100644 snes-core/src/cpu/instructionstemp/sei.rs create mode 100644 snes-core/src/cpu/instructionstemp/sep.rs diff --git a/snes-core/src/cpu/instructionstemp/mod.rs b/snes-core/src/cpu/instructionstemp/mod.rs index ff1d304..3ffed58 100644 --- a/snes-core/src/cpu/instructionstemp/mod.rs +++ b/snes-core/src/cpu/instructionstemp/mod.rs @@ -65,6 +65,10 @@ pub mod rti; pub mod rtl; pub mod rts; pub mod sbc; +pub mod sec; +pub mod sed; +pub mod sei; +pub mod sep; pub mod bit_common; pub mod dec_common; pub mod decoder_common; diff --git a/snes-core/src/cpu/instructionstemp/sec.rs b/snes-core/src/cpu/instructionstemp/sec.rs new file mode 100644 index 0000000..24f58a3 --- /dev/null +++ b/snes-core/src/cpu/instructionstemp/sec.rs @@ -0,0 +1,42 @@ +use crate::cpu::{bus::Bus, registers::Registers}; + +use crate::cpu::cycles; +use super::{CPUInstruction, Decode}; +use super::decoder_common; + +static INSTR_NAME: &'static str = "SEC"; + +pub struct SEC {} + +impl CPUInstruction for SEC { + fn execute(&self, registers: &mut Registers, _bus: &mut Bus) { + registers.set_carry_flag(true); + let (bytes, cycles) = cycles::increment_cycles_set_flag(); + registers.increment_pc(bytes); registers.cycles += cycles; + } +} + +impl Decode for SEC { + fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String { + decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME) + } +} + + +#[cfg(test)] +mod cpu_instructions_tests { + use super::*; + + #[test] + fn test() { + let mut registers = Registers::new(); + let mut bus = Bus::new(); + registers.pc = 0x0000; + registers.set_carry_flag(false); + let instruction = SEC{}; + instruction.execute(&mut registers, &mut bus); + assert_eq!(registers.get_carry_flag(), true); + assert_eq!(registers.pc, 0x0001); + assert_eq!(registers.cycles, 2); + } +} diff --git a/snes-core/src/cpu/instructionstemp/sed.rs b/snes-core/src/cpu/instructionstemp/sed.rs new file mode 100644 index 0000000..95ea077 --- /dev/null +++ b/snes-core/src/cpu/instructionstemp/sed.rs @@ -0,0 +1,42 @@ +use crate::cpu::{bus::Bus, registers::Registers}; + +use crate::cpu::cycles; +use super::{CPUInstruction, Decode}; +use super::decoder_common; + +static INSTR_NAME: &'static str = "SED"; + +pub struct SED {} + +impl CPUInstruction for SED { + fn execute(&self, registers: &mut Registers, _bus: &mut Bus) { + registers.set_decimal_mode_flag(true); + let (bytes, cycles) = cycles::increment_cycles_set_flag(); + registers.increment_pc(bytes); registers.cycles += cycles; + } +} + +impl Decode for SED { + fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String { + decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME) + } +} + + +#[cfg(test)] +mod cpu_instructions_tests { + use super::*; + + #[test] + fn test() { + let mut registers = Registers::new(); + let mut bus = Bus::new(); + registers.pc = 0x0000; + registers.set_decimal_mode_flag(false); + let instruction = SED{}; + instruction.execute(&mut registers, &mut bus); + assert_eq!(registers.get_decimal_mode_flag(), true); + assert_eq!(registers.pc, 0x0001); + assert_eq!(registers.cycles, 2); + } +} diff --git a/snes-core/src/cpu/instructionstemp/sei.rs b/snes-core/src/cpu/instructionstemp/sei.rs new file mode 100644 index 0000000..6b1560d --- /dev/null +++ b/snes-core/src/cpu/instructionstemp/sei.rs @@ -0,0 +1,42 @@ +use crate::cpu::{bus::Bus, registers::Registers}; + +use crate::cpu::cycles; +use super::{CPUInstruction, Decode}; +use super::decoder_common; + +static INSTR_NAME: &'static str = "SEI"; + +pub struct SEI {} + +impl CPUInstruction for SEI { + fn execute(&self, registers: &mut Registers, _bus: &mut Bus) { + registers.set_irq_disable_flag(true); + let (bytes, cycles) = cycles::increment_cycles_set_flag(); + registers.increment_pc(bytes); registers.cycles += cycles; + } +} + +impl Decode for SEI { + fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String { + decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME) + } +} + + +#[cfg(test)] +mod cpu_instructions_tests { + use super::*; + + #[test] + fn test() { + let mut registers = Registers::new(); + let mut bus = Bus::new(); + registers.pc = 0x0000; + registers.set_irq_disable_flag(false); + let instruction = SEI{}; + instruction.execute(&mut registers, &mut bus); + assert_eq!(registers.get_irq_disable_flag(), true); + assert_eq!(registers.pc, 0x0001); + assert_eq!(registers.cycles, 2); + } +} diff --git a/snes-core/src/cpu/instructionstemp/sep.rs b/snes-core/src/cpu/instructionstemp/sep.rs new file mode 100644 index 0000000..1d06ae8 --- /dev/null +++ b/snes-core/src/cpu/instructionstemp/sep.rs @@ -0,0 +1,45 @@ +use crate::cpu::{bus::Bus, registers::Registers}; + +use crate::cpu::cycles; +use crate::utils::addressing::AddressingMode; +use super::{CPUInstruction, Decode, read_8bit_from_address}; +use super::decoder_common; + +static INSTR_NAME: &'static str = "SEP"; + +pub struct SEP {} + +impl CPUInstruction for SEP { + fn execute(&self, registers: &mut Registers, bus: &mut Bus) { + let byte = read_8bit_from_address(registers, bus, AddressingMode::Immediate); + registers.set_sep_byte(byte); + let (bytes, cycles) = cycles::increment_cycles_sep(); + registers.increment_pc(bytes); registers.cycles += cycles; + } +} + +impl Decode for SEP { + fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String { + decoder_common::mnemonic_8bit_immediate(opcode, INSTR_NAME, registers, bus) + } +} + + +#[cfg(test)] +mod cpu_instructions_tests { + use super::*; + + #[test] + fn test() { + let mut registers = Registers::new(); + let mut bus = Bus::new(); + registers.pc = 0x0000; + registers.p = 0x00; + bus.write(0x0001, 0xFF); + let instruction = SEP{}; + instruction.execute(&mut registers, &mut bus); + assert_eq!(registers.p, 0xFF); + assert_eq!(registers.pc, 0x0002); + assert_eq!(registers.cycles, 3); + } +}