clear instructions

snes-core/src/cpu/instructionstemp/clc.rs

@@ -0,0 +1,42 @@
+use crate::cpu::{bus::Bus, registers::Registers};
+
+use crate::cpu::cycles;
+use super::{CPUInstruction, Decode};
+use super::decoder_common;
+
+static INSTR_NAME: &'static str = "CLC";
+
+pub struct CLC {}
+
+impl CPUInstruction for CLC {
+    fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
+        registers.set_carry_flag(false);
+        let (bytes, cycles) = cycles::increment_cycles_clear();
+        registers.increment_pc(bytes); registers.cycles += cycles;
+    }
+}
+
+impl Decode for CLC {
+    fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
+        decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
+    }
+}
+
+
+#[cfg(test)]
+mod cpu_instructions_tests {
+    use super::*;
+
+    #[test]
+    fn test() {
+        let mut registers = Registers::new();
+        let mut bus = Bus::new();
+        registers.set_carry_flag(true);
+        registers.pc  = 0x0000;
+        let instruction = CLC{};
+        instruction.execute(&mut registers, &mut bus);
+        assert!(!registers.get_carry_flag());
+        assert_eq!(registers.pc, 1);
+        assert_eq!(registers.cycles, 2);
+    }
+}

snes-core/src/cpu/instructionstemp/cld.rs

@@ -0,0 +1,42 @@
+use crate::cpu::{bus::Bus, registers::Registers};
+
+use crate::cpu::cycles;
+use super::{CPUInstruction, Decode};
+use super::decoder_common;
+
+static INSTR_NAME: &'static str = "CLD";
+
+pub struct CLD {}
+
+impl CPUInstruction for CLD {
+    fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
+        registers.set_decimal_mode_flag(false);
+        let (bytes, cycles) = cycles::increment_cycles_clear();
+        registers.increment_pc(bytes); registers.cycles += cycles;
+    }
+}
+
+impl Decode for CLD {
+    fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
+        decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
+    }
+}
+
+
+#[cfg(test)]
+mod cpu_instructions_tests {
+    use super::*;
+
+    #[test]
+    fn test() {
+        let mut registers = Registers::new();
+        let mut bus = Bus::new();
+        registers.set_decimal_mode_flag(true);
+        registers.pc  = 0x0000;
+        let instruction = CLD{};
+        instruction.execute(&mut registers, &mut bus);
+        assert!(!registers.get_decimal_mode_flag());
+        assert_eq!(registers.pc, 1);
+        assert_eq!(registers.cycles, 2);
+    }
+}

snes-core/src/cpu/instructionstemp/cli.rs

@@ -0,0 +1,42 @@
+use crate::cpu::{bus::Bus, registers::Registers};
+
+use crate::cpu::cycles;
+use super::{CPUInstruction, Decode};
+use super::decoder_common;
+
+static INSTR_NAME: &'static str = "CLI";
+
+pub struct CLI {}
+
+impl CPUInstruction for CLI {
+    fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
+        registers.set_irq_disable_flag(false);
+        let (bytes, cycles) = cycles::increment_cycles_clear();
+        registers.increment_pc(bytes); registers.cycles += cycles;
+    }
+}
+
+impl Decode for CLI {
+    fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
+        decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
+    }
+}
+
+
+#[cfg(test)]
+mod cpu_instructions_tests {
+    use super::*;
+
+    #[test]
+    fn test() {
+        let mut registers = Registers::new();
+        let mut bus = Bus::new();
+        registers.set_irq_disable_flag(true);
+        registers.pc  = 0x0000;
+        let instruction = CLI{};
+        instruction.execute(&mut registers, &mut bus);
+        assert!(!registers.get_irq_disable_flag());
+        assert_eq!(registers.pc, 1);
+        assert_eq!(registers.cycles, 2);
+    }
+}

snes-core/src/cpu/instructionstemp/clv.rs

@@ -0,0 +1,42 @@
+use crate::cpu::{bus::Bus, registers::Registers};
+
+use crate::cpu::cycles;
+use super::{CPUInstruction, Decode};
+use super::decoder_common;
+
+static INSTR_NAME: &'static str = "CLV";
+
+pub struct CLV {}
+
+impl CPUInstruction for CLV {
+    fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
+        registers.set_overflow_flag(false);
+        let (bytes, cycles) = cycles::increment_cycles_clear();
+        registers.increment_pc(bytes); registers.cycles += cycles;
+    }
+}
+
+impl Decode for CLV {
+    fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
+        decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
+    }
+}
+
+
+#[cfg(test)]
+mod cpu_instructions_tests {
+    use super::*;
+
+    #[test]
+    fn test() {
+        let mut registers = Registers::new();
+        let mut bus = Bus::new();
+        registers.set_overflow_flag(true);
+        registers.pc  = 0x0000;
+        let instruction = CLV{};
+        instruction.execute(&mut registers, &mut bus);
+        assert!(!registers.get_overflow_flag());
+        assert_eq!(registers.pc, 1);
+        assert_eq!(registers.cycles, 2);
+    }
+}

snes-core/src/cpu/instructionstemp/mod.rs

@@ -17,6 +17,10 @@ pub mod brl;
 pub mod bvc;
 pub mod bvs;
 pub mod bit;
+pub mod clc;
+pub mod cld;
+pub mod cli;
+pub mod clv;
 pub mod bit_common;
 pub mod decoder_common;
 pub mod branch_common;