FranLMSP/snes
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130 Commits 12 Branches 0 Tags
98c2c90c08dcd5f3ba1d96898993f2ae050ebf37
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Author SHA1 Message Date
FranLMSP 98c2c90c08 Refactor CPU instructions (#2) 2023-12-30 21:34:08 +00:00
FranLMSP 2e4dd7b15c decouple cycle increment logic from cpu struct (#1) 2023-12-26 03:42:07 +00:00
FranLMSP 1642d582cb add emulator screenshot 2023-12-10 14:28:31 -05:00
FranLMSP 28784f47d3 refactor DMA ticking, cpuadc chars are now visible through debug window 2023-10-07 23:33:35 -05:00
FranLMSP 7769964cf6 WIP DMA transfer logic 2023-10-07 15:32:55 -05:00
FranLMSP e701274cdb Small readability refactor 2023-10-07 11:21:37 -05:00
FranLMSP 7bdd9ab285 fix tests 2023-10-06 23:14:55 -05:00
FranLMSP 5c8bd6afca fix ldx and stx instructions and small refactor to vram 2023-10-06 23:08:03 -05:00
FranLMSP 8f05a21ebc Fix bugs with emulation mode flag 2023-10-05 16:21:33 -05:00
FranLMSP 265da3470f attempt to fix charset rendering (no success) 2023-07-10 21:43:01 -05:00
FranLMSP 703e819e80 WIP charset map render 2023-07-09 19:09:35 -05:00
FranLMSP 967cf77cc2 fix vblank nmi register and address mapping 2023-07-09 16:14:51 -05:00
FranLMSP ea7fb8ce65 define all ppu registers 2023-07-09 14:03:59 -05:00
FranLMSP 85f41b872d refactor frame loop 2023-07-09 12:40:52 -05:00
FranLMSP a68a4b1764 Adjustments to make emu core run faster when not paused 2023-07-08 23:44:24 -05:00
FranLMSP b9f0079854 rearrange windows 2023-07-08 23:21:47 -05:00
FranLMSP ff76817796 bugfix (using wrong boolean for disassembler) 2023-07-08 22:15:59 -05:00
FranLMSP 3e32e9d606 display PPU registers and VRAM debug info 2023-07-07 21:58:15 -05:00
FranLMSP e6d97f7203 read_external function 2023-07-07 19:13:31 -05:00
FranLMSP e7a40db745 vram writes, reads, auto increments and clear vblank nmi flag when read 2023-07-05 23:13:14 -05:00
FranLMSP a82c554b25 WIP VRAM writes 2023-07-05 21:47:43 -05:00
FranLMSP 98861336d1 functions to get background char and tile addresses 2023-07-04 22:22:43 -05:00
FranLMSP c8db7d6e68 get_bg_modes function 2023-07-02 20:24:58 -05:00
FranLMSP 9d99d2d194 WIP vblank nmi 2023-07-02 17:30:42 -05:00
FranLMSP 300456a2ef h/v counters 2023-07-02 10:29:10 -05:00
FranLMSP 4ae49442ec update readme 2023-07-01 15:50:46 -05:00
FranLMSP bc47d374e0 Fix branching bug 2023-06-20 21:51:40 -05:00
FranLMSP 92929af185 Fix bugs related to 16bit mode, emulation mode and REP instruction 2023-06-19 21:50:52 -05:00
FranLMSP ecaaaab4b4 WIP Interrupt handling 2023-05-30 21:13:52 -05:00
FranLMSP 93cc597c10 wai and wdm instructions 2023-05-22 23:16:21 -05:00
FranLMSP 95397a6275 Reset vector and rst instruction 2023-05-22 21:57:09 -05:00
FranLMSP ad94af0a61 direct_page_indexed_indirect wrapping add failsafe 2023-05-22 21:33:32 -05:00
FranLMSP c98c7bdc2d print status flags 2023-05-20 23:20:48 -05:00
FranLMSP c6865eed68 Small disassembler 2023-05-20 23:03:20 -05:00
FranLMSP 71801857f0 XCE instruction 2023-05-20 18:54:42 -05:00
FranLMSP 7b12911e4a Reset vector 2023-05-15 22:21:22 -05:00
FranLMSP cc5f57c911 Adjust lo_rom mapping 2023-05-15 21:57:30 -05:00
FranLMSP a44895645c memory map viewer 2023-05-14 22:33:44 -05:00
FranLMSP 0cc55d7b20 update readme, remove todo! from bus and display registers 2023-05-11 22:08:42 -05:00
FranLMSP 8333eb13cb WIP emulator state 2023-05-07 23:08:23 -05:00
FranLMSP 356a963aee Add test rom resource 2023-05-07 21:54:34 -05:00
FranLMSP ac4c749e37 WIP PPU registers and background rendering 2022-12-14 00:13:42 -05:00
FranLMSP a3f12e61b4 WIP PPU structure 2022-12-12 22:04:03 -05:00
FranLMSP 0d1e8f8078 bunch of ppu registers 2022-12-12 21:46:36 -05:00
FranLMSP c2c4cab19e Basic file loading 2022-12-10 19:06:26 -05:00
FranLMSP f19b9bdfeb Basic framebuffer rendering 2022-12-10 18:40:52 -05:00
FranLMSP 4678647cf0 Small refactor and define rom trait 2022-12-10 15:26:48 -05:00
FranLMSP c0e0afb1c2 TRB and TSB instructions 2022-12-05 21:10:18 -05:00
FranLMSP 9c955cccf2 RTI 2022-12-05 20:35:40 -05:00
FranLMSP 61f4961029 MVN and MVP instructions 2022-12-05 20:29:33 -05:00
FranLMSP 1b4200bf5e WIP BRK and COP instructions 2022-12-05 19:35:16 -05:00
FranLMSP 296500cc8e XBA instruction 2022-12-05 17:44:26 -05:00
FranLMSP 2440723263 Unimplemented 2022-12-05 17:15:59 -05:00
FranLMSP ee92d48e38 Last transfer instructions 2022-12-05 16:56:03 -05:00
FranLMSP db43baad93 First transfer instructions 2022-12-05 16:09:55 -05:00
FranLMSP e9d4aff1ae Store instructions 2022-12-04 22:01:28 -05:00
FranLMSP 732b0ad7e8 SET instructions 2022-12-04 21:06:38 -05:00
FranLMSP 6fad642d6f Rearrange instructions 2022-12-04 20:33:25 -05:00
FranLMSP 9d61a408c9 RTL and RTS instructions 2022-12-04 20:32:02 -05:00
FranLMSP 891dadc9b6 ROL and ROR instructions 2022-11-30 21:07:41 -05:00
FranLMSP 4d190e9523 REP instruction 2022-11-30 20:55:04 -05:00
FranLMSP a8844a1ae1 Remaining pull instructions 2022-11-30 20:33:19 -05:00
FranLMSP 5c43a020c1 PLA instruction 2022-11-29 22:33:06 -05:00
FranLMSP 46b494eeec Last push instructions 2022-11-29 21:34:23 -05:00
FranLMSP 6b1dd9a583 PHB 2022-11-27 21:33:57 -05:00
FranLMSP 54b7428267 PHA 2022-11-27 21:29:18 -05:00
FranLMSP fe88058d97 PER 2022-11-27 21:22:44 -05:00
FranLMSP 3ae26ba569 PEI unit test 2022-11-27 21:05:20 -05:00
FranLMSP 3785fd5001 PEA and PEI instructions 2022-11-27 15:45:55 -05:00
FranLMSP 074ae9772e A bit of opcode ordering 2022-11-27 15:31:01 -05:00
FranLMSP 10c482b328 Load index instructions 2022-11-27 15:26:24 -05:00
FranLMSP d21d00dc18 LDA 2022-11-27 15:06:26 -05:00
FranLMSP f6a793c4ae JSR instructions 2022-11-27 14:47:50 -05:00
FranLMSP d705c2138c JMP instruction 2022-11-27 12:44:02 -05:00
FranLMSP 41111c3158 ORA instruction 2022-11-27 09:28:05 -05:00
FranLMSP 31aa639a3c NOP 2022-11-27 09:10:36 -05:00
FranLMSP 253201c6c5 LSR instruction 2022-11-27 09:08:44 -05:00
FranLMSP 9980ce2c9f INC, INX and INY instructions 2022-11-26 22:23:20 -05:00
FranLMSP 53cb8b1d9e EOR 2022-11-26 22:15:51 -05:00
FranLMSP fdb324686a alu XOR 2022-11-26 22:02:08 -05:00
FranLMSP 82f8676a39 DEC, DEX and DEY instructions 2022-11-26 21:51:51 -05:00
FranLMSP b1b80e0c48 Small refactor for CMP instructions 2022-11-26 19:45:28 -05:00
FranLMSP df6424a6c4 CPX and CPY instructions 2022-11-26 19:19:27 -05:00
FranLMSP c37a4c3ba1 cmp instruction 2022-11-26 18:44:39 -05:00
FranLMSP 912099cf8d unimplemented brk instruction 2022-11-25 21:56:46 -05:00
FranLMSP e13b93d9e3 Branch instructions 2022-11-25 21:52:57 -05:00
FranLMSP ab6c526892 CLC, CLD, CLI and CLV instructions 2022-11-24 23:23:18 -05:00
FranLMSP 0ea8fdca2c BIT instruction 2022-11-24 23:10:02 -05:00
FranLMSP e9f3cd24c7 Refactor affected flags on alu function 2022-11-23 23:05:00 -05:00
FranLMSP fbee6fa8e9 set_flags function 2022-11-23 21:57:41 -05:00
FranLMSP fa230e4a52 Refactor BCD operations 2022-11-23 21:07:57 -05:00
FranLMSP d0e02cd9cd set overflow flag for adc and sbc 2022-11-21 21:51:13 -05:00
FranLMSP cc9968dd93 Small refactor to cycles module 2022-11-21 19:06:26 -05:00
FranLMSP 89a81917e0 Refactur alu tests 2022-11-21 18:53:58 -05:00
FranLMSP 686069dd03 Refactor asl 2022-11-21 18:45:09 -05:00
FranLMSP 7a17cb4038 Refactor and 2022-11-21 18:34:05 -05:00
FranLMSP 992112229e refactor sbc_bin 2022-11-21 18:26:55 -05:00
FranLMSP 6706daa872 Refactor adc_bin 2022-11-21 18:18:24 -05:00
FranLMSP 20747f5fad ASL instruction 2022-11-20 23:19:39 -05:00
FranLMSP f78883257a AND instructions 2022-11-20 20:55:23 -05:00