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Rearrange instructions

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This commit is contained in:
Franco Colmenarez
2022-12-04 20:33:25 -05:00
parent 9d61a408c9
commit 6fad642d6f
1 changed files with 16 additions and 16 deletions
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snes-core/src/cpu/instructions.rs
+16 -16
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@@ -818,22 +818,6 @@ impl CPU {
0x77 => self.adc(bus, A::DirectPageIndirectLongIndexed(I::Y)),
0x63 => self.adc(bus, A::StackRelative),
0x73 => self.adc(bus, A::StackRelativeIndirectIndexed(I::Y)),
// SBC
0xE9 => self.sbc(bus, A::Immediate),
0xED => self.sbc(bus, A::Absolute),
0xEF => self.sbc(bus, A::AbsoluteLong),
0xE5 => self.sbc(bus, A::DirectPage),
0xF2 => self.sbc(bus, A::DirectPageIndirect),
0xE7 => self.sbc(bus, A::DirectPageIndirectLong),
0xFD => self.sbc(bus, A::AbsoluteIndexed(I::X)),
0xFF => self.sbc(bus, A::AbsoluteLongIndexed(I::X)),
0xF9 => self.sbc(bus, A::AbsoluteIndexed(I::Y)),
0xF5 => self.sbc(bus, A::DirectPageIndexed(I::X)),
0xE1 => self.sbc(bus, A::DirectPageIndexedIndirect(I::X)),
0xF1 => self.sbc(bus, A::DirectPageIndirectIndexed(I::Y)),
0xF7 => self.sbc(bus, A::DirectPageIndirectLongIndexed(I::Y)),
0xE3 => self.sbc(bus, A::StackRelative),
0xF3 => self.sbc(bus, A::StackRelativeIndirectIndexed(I::Y)),
// AND
0x29 => self.and(bus, A::Immediate),
0x2D => self.and(bus, A::Absolute),
@@ -1072,6 +1056,22 @@ impl CPU {
0x6B => self.rtl(bus),
// RTS
0x60 => self.rts(bus),
// SBC
0xE9 => self.sbc(bus, A::Immediate),
0xED => self.sbc(bus, A::Absolute),
0xEF => self.sbc(bus, A::AbsoluteLong),
0xE5 => self.sbc(bus, A::DirectPage),
0xF2 => self.sbc(bus, A::DirectPageIndirect),
0xE7 => self.sbc(bus, A::DirectPageIndirectLong),
0xFD => self.sbc(bus, A::AbsoluteIndexed(I::X)),
0xFF => self.sbc(bus, A::AbsoluteLongIndexed(I::X)),
0xF9 => self.sbc(bus, A::AbsoluteIndexed(I::Y)),
0xF5 => self.sbc(bus, A::DirectPageIndexed(I::X)),
0xE1 => self.sbc(bus, A::DirectPageIndexedIndirect(I::X)),
0xF1 => self.sbc(bus, A::DirectPageIndirectIndexed(I::Y)),
0xF7 => self.sbc(bus, A::DirectPageIndirectLongIndexed(I::Y)),
0xE3 => self.sbc(bus, A::StackRelative),
0xF3 => self.sbc(bus, A::StackRelativeIndirectIndexed(I::Y)),
_ => println!("Invalid opcode: {:02X}", opcode),
}
}