FranLMSP
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59a3ca286a
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fix stack relative addressing mode
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2024-03-10 19:06:06 -05:00 |
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FranLMSP
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48309a0021
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Minor fixes with addressing modes and ldy instr
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2024-01-29 21:44:47 -05:00 |
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FranLMSP
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467ffd791e
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Fix addressing modes (#6)
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2024-01-29 03:12:40 +00:00 |
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FranLMSP
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b9699e6276
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Fix ADC and SBC instructions and add test runner script (#5)
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2024-01-28 22:54:00 +00:00 |
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FranLMSP
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e2446514db
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clippy fix
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2024-01-15 21:50:57 -05:00 |
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FranLMSP
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98c2c90c08
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Refactor CPU instructions (#2)
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2023-12-30 21:34:08 +00:00 |
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FranLMSP
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e7a40db745
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vram writes, reads, auto increments and clear vblank nmi flag when read
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2023-07-05 23:13:14 -05:00 |
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FranLMSP
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ad94af0a61
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direct_page_indexed_indirect wrapping add failsafe
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2023-05-22 21:33:32 -05:00 |
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FranLMSP
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4678647cf0
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Small refactor and define rom trait
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2022-12-10 15:26:48 -05:00 |
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FranLMSP
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891dadc9b6
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ROL and ROR instructions
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2022-11-30 21:07:41 -05:00 |
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FranLMSP
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4d190e9523
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REP instruction
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2022-11-30 20:55:04 -05:00 |
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FranLMSP
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d705c2138c
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JMP instruction
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2022-11-27 12:44:02 -05:00 |
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FranLMSP
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41111c3158
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ORA instruction
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2022-11-27 09:28:05 -05:00 |
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FranLMSP
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253201c6c5
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LSR instruction
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2022-11-27 09:08:44 -05:00 |
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FranLMSP
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53cb8b1d9e
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EOR
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2022-11-26 22:15:51 -05:00 |
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FranLMSP
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fdb324686a
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alu XOR
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2022-11-26 22:02:08 -05:00 |
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FranLMSP
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82f8676a39
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DEC, DEX and DEY instructions
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2022-11-26 21:51:51 -05:00 |
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FranLMSP
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c37a4c3ba1
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cmp instruction
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2022-11-26 18:44:39 -05:00 |
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FranLMSP
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0ea8fdca2c
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BIT instruction
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2022-11-24 23:10:02 -05:00 |
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FranLMSP
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e9f3cd24c7
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Refactor affected flags on alu function
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2022-11-23 23:05:00 -05:00 |
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FranLMSP
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fa230e4a52
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Refactor BCD operations
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2022-11-23 21:07:57 -05:00 |
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FranLMSP
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d0e02cd9cd
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set overflow flag for adc and sbc
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2022-11-21 21:51:13 -05:00 |
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FranLMSP
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89a81917e0
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Refactur alu tests
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2022-11-21 18:53:58 -05:00 |
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FranLMSP
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686069dd03
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Refactor asl
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2022-11-21 18:45:09 -05:00 |
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FranLMSP
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7a17cb4038
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Refactor and
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2022-11-21 18:34:05 -05:00 |
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FranLMSP
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992112229e
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refactor sbc_bin
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2022-11-21 18:26:55 -05:00 |
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FranLMSP
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6706daa872
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Refactor adc_bin
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2022-11-21 18:18:24 -05:00 |
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FranLMSP
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20747f5fad
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ASL instruction
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2022-11-20 23:19:39 -05:00 |
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FranLMSP
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f78883257a
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AND instructions
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2022-11-20 20:55:23 -05:00 |
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FranLMSP
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794cbef477
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Base byte and cycles calculation based on addressing mode
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2022-11-20 17:07:21 -05:00 |
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FranLMSP
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4ddc3b3aa7
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SBC opcodes
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2022-11-20 12:11:36 -05:00 |
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FranLMSP
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f8a6872b8c
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Fix BCD substraction
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2022-11-20 11:32:02 -05:00 |
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FranLMSP
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d90017111c
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WIP DEC functions
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2022-11-09 21:06:09 -05:00 |
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FranLMSP
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391e29c365
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Fix bcd additions
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2022-10-13 12:15:22 -05:00 |
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FranLMSP
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e1f9542cca
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Refactor opcode execution and adc instruction
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2022-10-13 00:37:03 -05:00 |
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FranLMSP
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6acf97c7bd
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Small refactor for match statement
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2022-10-12 07:42:32 -05:00 |
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FranLMSP
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f6f2ebb8a8
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Get value from address mode
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2022-10-11 21:58:06 -05:00 |
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FranLMSP
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3dc25cf551
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Address addressing modes
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2022-10-10 22:13:26 -05:00 |
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FranLMSP
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761303a237
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BCD addition for 8 and 16 bits
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2022-10-04 21:47:52 -05:00 |
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FranLMSP
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54c0f6d738
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Unit tests for adc8bcd
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2022-09-25 18:30:53 -05:00 |
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FranLMSP
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a136136766
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alu 8 and 16 bit bin add
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2022-07-12 21:17:45 -05:00 |
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