dec instrs

This commit is contained in:
2023-12-28 20:52:58 -05:00
parent 515ff799c8
commit 3615799e83
5 changed files with 305 additions and 0 deletions
+91
View File
@@ -0,0 +1,91 @@
use crate::{cpu::{bus::Bus, registers::Registers}, utils::addressing::AddressingMode};
use crate::cpu::cycles;
use super::{CPUInstruction, Decode, write_8bit_to_address, write_16bit_to_address, read_8bit_from_address, read_16bit_from_address, dec_common};
use super::decoder_common;
static INSTR_NAME: &'static str = "DEC";
pub struct DEC8 {
addressing_mode: AddressingMode,
}
impl CPUInstruction for DEC8 {
fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
let result = dec_common::do_dec(
registers,
read_8bit_from_address(registers, bus, self.addressing_mode),
) as u8;
write_8bit_to_address(registers, bus, self.addressing_mode, result);
let (bytes, cycles) = cycles::increment_cycles_inc_dec(&registers, self.addressing_mode);
registers.increment_pc(bytes); registers.cycles += cycles;
}
}
impl Decode for DEC8 {
fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
}
}
pub struct DEC16 {
addressing_mode: AddressingMode,
}
impl CPUInstruction for DEC16 {
fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
let result = dec_common::do_dec(
registers,
read_16bit_from_address(registers, bus, self.addressing_mode),
) as u16;
write_16bit_to_address(registers, bus, self.addressing_mode, result);
let (bytes, cycles) = cycles::increment_cycles_inc_dec(&registers, self.addressing_mode);
registers.increment_pc(bytes); registers.cycles += cycles;
}
}
impl Decode for DEC16 {
fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
}
}
#[cfg(test)]
mod cpu_instructions_tests {
use super::*;
#[test]
fn test_8bit() {
let mut registers = Registers::new();
let mut bus = Bus::new();
registers.a = 0x0001;
registers.pbr = 0x00;
registers.pc = 0x0000;
registers.set_memory_select_flag(true);
let instruction = DEC8{addressing_mode: AddressingMode::Accumulator};
instruction.execute(&mut registers, &mut bus);
assert_eq!(registers.a, 0);
assert_eq!(registers.pc, 0x01);
assert_eq!(registers.cycles, 2);
assert!(!registers.get_negative_flag());
assert!(registers.get_zero_flag());
}
#[test]
fn test_16bit() {
let mut registers = Registers::new();
let mut bus = Bus::new();
registers.a = 0x0001;
registers.pbr = 0x00;
registers.pc = 0x0000;
registers.set_memory_select_flag(true);
let instruction = DEC16{addressing_mode: AddressingMode::Accumulator};
instruction.execute(&mut registers, &mut bus);
assert_eq!(registers.a, 0);
assert_eq!(registers.pc, 0x01);
assert_eq!(registers.cycles, 2);
assert!(!registers.get_negative_flag());
assert!(registers.get_zero_flag());
}
}
@@ -0,0 +1,12 @@
use crate::{cpu::registers::Registers, utils::{num_trait::SnesNum, alu}, common::flags::Flags};
pub fn do_dec<T: SnesNum>(registers: &mut Registers, target: T) -> T {
let (result, affected_flags) = alu::sbc_bin(target, T::from_u32(1), false);
for flag in affected_flags {
match flag {
Flags::Negative(_) | Flags::Zero(_) => registers.set_flags(&[flag]),
_ => {},
}
}
result
}
+85
View File
@@ -0,0 +1,85 @@
use crate::cpu::{bus::Bus, registers::Registers};
use crate::cpu::cycles;
use super::{CPUInstruction, Decode, dec_common};
use super::decoder_common;
static INSTR_NAME: &'static str = "DEX";
pub struct DEX8 {}
impl CPUInstruction for DEX8 {
fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
let result = dec_common::do_dec(
registers,
registers.x,
) as u8;
registers.set_low_x(result);
let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
registers.increment_pc(bytes); registers.cycles += cycles;
}
}
impl Decode for DEX8 {
fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
}
}
pub struct DEX16 {}
impl CPUInstruction for DEX16 {
fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
let result = dec_common::do_dec(
registers,
registers.x,
) as u16;
registers.x = result;
let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
registers.increment_pc(bytes); registers.cycles += cycles;
}
}
impl Decode for DEX16 {
fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
}
}
#[cfg(test)]
mod cpu_instructions_tests {
use super::*;
#[test]
fn test_8bit() {
let mut registers = Registers::new();
let mut bus = Bus::new();
registers.x = 0x0001;
registers.pbr = 0x00;
registers.pc = 0x0000;
let instruction = DEX8{};
instruction.execute(&mut registers, &mut bus);
assert_eq!(registers.x, 0);
assert_eq!(registers.pc, 0x01);
assert_eq!(registers.cycles, 2);
assert!(!registers.get_negative_flag());
assert!(registers.get_zero_flag());
}
#[test]
fn test_16bit() {
let mut registers = Registers::new();
let mut bus = Bus::new();
registers.x = 0x0001;
registers.pbr = 0x00;
registers.pc = 0x0000;
let instruction = DEX16{};
instruction.execute(&mut registers, &mut bus);
assert_eq!(registers.x, 0);
assert_eq!(registers.pc, 0x01);
assert_eq!(registers.cycles, 2);
assert!(!registers.get_negative_flag());
assert!(registers.get_zero_flag());
}
}
+85
View File
@@ -0,0 +1,85 @@
use crate::cpu::{bus::Bus, registers::Registers};
use crate::cpu::cycles;
use super::{CPUInstruction, Decode, dec_common};
use super::decoder_common;
static INSTR_NAME: &'static str = "DEY";
pub struct DEY8 {}
impl CPUInstruction for DEY8 {
fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
let result = dec_common::do_dec(
registers,
registers.y,
) as u8;
registers.set_low_y(result);
let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
registers.increment_pc(bytes); registers.cycles += cycles;
}
}
impl Decode for DEY8 {
fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
}
}
pub struct DEY16 {}
impl CPUInstruction for DEY16 {
fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
let result = dec_common::do_dec(
registers,
registers.y,
) as u16;
registers.y = result;
let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
registers.increment_pc(bytes); registers.cycles += cycles;
}
}
impl Decode for DEY16 {
fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
}
}
#[cfg(test)]
mod cpu_instructions_tests {
use super::*;
#[test]
fn test_8bit() {
let mut registers = Registers::new();
let mut bus = Bus::new();
registers.y = 0x0001;
registers.pbr = 0x00;
registers.pc = 0x0000;
let instruction = DEY8{};
instruction.execute(&mut registers, &mut bus);
assert_eq!(registers.y, 0);
assert_eq!(registers.pc, 0x01);
assert_eq!(registers.cycles, 2);
assert!(!registers.get_negative_flag());
assert!(registers.get_zero_flag());
}
#[test]
fn test_16bit() {
let mut registers = Registers::new();
let mut bus = Bus::new();
registers.y = 0x0001;
registers.pbr = 0x00;
registers.pc = 0x0000;
let instruction = DEY16{};
instruction.execute(&mut registers, &mut bus);
assert_eq!(registers.y, 0);
assert_eq!(registers.pc, 0x01);
assert_eq!(registers.cycles, 2);
assert!(!registers.get_negative_flag());
assert!(registers.get_zero_flag());
}
}
+32
View File
@@ -25,7 +25,11 @@ pub mod cmp;
pub mod cop;
pub mod cpx;
pub mod cpy;
pub mod dec;
pub mod dex;
pub mod dey;
pub mod bit_common;
pub mod dec_common;
pub mod decoder_common;
pub mod branch_common;
pub mod push_common;
@@ -66,3 +70,31 @@ pub fn read_16bit_from_address(registers: &Registers, bus: &mut Bus, addressing_
)
}
}
pub fn write_8bit_to_address(registers: &mut Registers, bus: &mut Bus, addressing_mode: AddressingMode, value: u8) {
match addressing_mode {
AddressingMode::Accumulator => registers.set_low_a(value),
_ => addressing_mode.store_8bit(
bus,
registers.get_pc_address(),
registers.d,
registers.sp,
registers.x, registers.y,
value,
),
};
}
pub fn write_16bit_to_address(registers: &mut Registers, bus: &mut Bus, addressing_mode: AddressingMode, value: u16) {
match addressing_mode {
AddressingMode::Accumulator => registers.a = value,
_ => addressing_mode.store_16bit(
bus,
registers.get_pc_address(),
registers.d,
registers.sp,
registers.x, registers.y,
value,
),
};
}