FranLMSP/rmg-001
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Author SHA1 Message Date
FranLMSP dbe95bedf2 Increment and decrement instructions 2021-10-14 23:58:51 -05:00
FranLMSP 724cb27c49 Functions and tests for detecting half carry 2021-10-14 23:32:48 -05:00
FranLMSP b2190d1868 Refactor enums 2021-10-14 21:54:43 -05:00
FranLMSP 253da76fd5 CALL u16 and RST instructions 2021-10-14 17:07:51 -05:00
FranLMSP d26b77dc78 Some refactors 2021-10-14 16:13:28 -05:00
FranLMSP a5fad87319 RLCA, LD and DI instructions 2021-10-14 13:25:20 -05:00
FranLMSP bc3b25857b Little refactor 2021-10-14 08:38:57 -05:00
FranLMSP 92229e3d93 JP u16 instruction 2021-10-13 20:50:48 -05:00
FranLMSP 5d04b7c346 Modeling the Bus and writing first test for NOP instruction 2021-10-13 19:38:37 -05:00
FranLMSP 2afa2a1ff8 Memory maps 2021-10-13 12:56:00 -05:00
FranLMSP 1902884df9 Logic to load a rom file 2021-10-12 19:11:52 -05:00
FranLMSP 1e363187f1 Define test for CPU instructions (no tests yet) 2021-10-12 18:29:25 -05:00
FranLMSP f62926a869 Enum most opcode parameters (CB prefix remaining) 2021-10-12 18:06:07 -05:00
FranLMSP 9bf80459a7 Add illegal instruction 2021-10-12 12:52:04 -05:00
FranLMSP bbf6b19957 Mapping opcodes 2021-10-11 20:38:37 -05:00
FranLMSP 5e825a9298 Create LICENSE 2021-10-11 20:30:17 +00:00
FranLMSP 0deee302ea Add readme 2021-10-11 14:51:24 -05:00
FranLMSP b6f512f97b Tests for registers getters and setters 2021-10-11 13:14:08 -05:00
FranLMSP d37699f4a8 Functions and tests for some bitwise operations and getter/setter for flag register 2021-10-11 12:58:09 -05:00
FranLMSP b3e6baaa3f Getters and setters for registers 2021-10-11 11:39:13 -05:00
FranLMSP 9818c57854 Define CPU registers 2021-10-11 10:53:02 -05:00
FranLMSP c6246a9502 First commit 2021-10-11 09:57:30 -05:00