Fix DMA bug

2026-01-01 07:31:34 -05:00 · 2021-11-19 13:26:16 -05:00
parent 186d6fa23b
commit 2eb5d55bcc
1 changed files with 1 additions and 1 deletions
--- a/src/bus.rs
+++ b/src/bus.rs
@@ -139,7 +139,7 @@ impl Bus {
            let mut count: u16 = 0;
            let oam_addr = SPRITE_ATTRIBUTE_TABLE.min().unwrap();
            while count < 160 {
-                self.ppu.write_oam(oam_addr + count, self.data[(source + count) as usize]);
+                self.ppu.write_oam(oam_addr + count, self.read(source + count));
                count += 1;
            }
        } else if PPU::is_io_register(address) {