opcode mapper

snes-core/src/cpu/instructionstemp/adc.rs

@@ -1,11 +1,43 @@
 use crate::{cpu::{bus::Bus, registers::Registers}, utils::{alu, addressing::AddressingMode}};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, read_8bit_from_address, read_16bit_from_address};
+use super::{CPUInstruction, read_write_common::{read_8bit_from_address, read_16bit_from_address}};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "ADC";
 
+pub struct ADC {
+    pub addressing_mode: AddressingMode,
+}
+
+impl ADC {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        let is_decimal_mode = registers.get_decimal_mode_flag();
+        match registers.is_16bit_mode() {
+            true => match is_decimal_mode {
+                true => Box::new(ADC16BCD{addressing_mode: self.addressing_mode}),
+                false => Box::new(ADC16BIN{addressing_mode: self.addressing_mode}),
+            }
+            false => match is_decimal_mode {
+                true => Box::new(ADC8BCD{addressing_mode: self.addressing_mode}),
+                false => Box::new(ADC8BIN{addressing_mode: self.addressing_mode}),
+            }
+        }
+    }
+}
+
+impl CPUInstruction for ADC {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct ADC8BIN {
     addressing_mode: AddressingMode,
 }
@@ -22,9 +54,7 @@ impl CPUInstruction for ADC8BIN {
         let (bytes, cycles) = cycles::increment_cycles_arithmetic(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for ADC8BIN {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -46,9 +76,7 @@ impl CPUInstruction for ADC16BIN {
         let (bytes, cycles) = cycles::increment_cycles_arithmetic(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for ADC16BIN {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -70,9 +98,7 @@ impl CPUInstruction for ADC8BCD {
         let (bytes, cycles) = cycles::increment_cycles_arithmetic(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for ADC8BCD {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -94,9 +120,7 @@ impl CPUInstruction for ADC16BCD {
         let (bytes, cycles) = cycles::increment_cycles_arithmetic(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for ADC16BCD {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/and.rs

@@ -1,11 +1,36 @@
 use crate::{cpu::{bus::Bus, registers::Registers}, utils::{alu, addressing::AddressingMode}};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, read_8bit_from_address, read_16bit_from_address};
+use super::{CPUInstruction, read_write_common::{read_8bit_from_address, read_16bit_from_address}};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "AND";
 
+pub struct AND {
+    pub addressing_mode: AddressingMode,
+}
+
+impl AND {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_mode() {
+            true => Box::new(AND16{addressing_mode: self.addressing_mode}),
+            false => Box::new(AND8{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for AND {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct AND8 {
     addressing_mode: AddressingMode,
 }
@@ -21,9 +46,7 @@ impl CPUInstruction for AND8 {
         let (bytes, cycles) = cycles::increment_cycles_bitwise(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for AND8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -44,9 +67,7 @@ impl CPUInstruction for AND16 {
         let (bytes, cycles) = cycles::increment_cycles_bitwise(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for AND16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/asl.rs

@@ -1,11 +1,36 @@
 use crate::{cpu::{bus::Bus, registers::Registers}, utils::{alu, addressing::AddressingMode}};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "ASL";
 
+pub struct ASL {
+    pub addressing_mode: AddressingMode,
+}
+
+impl ASL {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_mode() {
+            true => Box::new(ASL8{addressing_mode: self.addressing_mode}),
+            false => Box::new(ASL16{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for ASL {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct ASL8 {
     addressing_mode: AddressingMode,
 }
@@ -20,9 +45,7 @@ impl CPUInstruction for ASL8 {
         let (bytes, cycles) = cycles::increment_cycles_bitwise(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for ASL8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -42,9 +65,7 @@ impl CPUInstruction for ASL16 {
         let (bytes, cycles) = cycles::increment_cycles_bitwise(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for ASL16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/bcc.rs

@@ -1,6 +1,6 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 use super::branch_common;
 
@@ -12,9 +12,7 @@ impl CPUInstruction for BCC {
     fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
         branch_common::do_branch_instr(registers, bus, !registers.get_carry_flag());
     }
-}
 
-impl Decode for BCC {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_branch_nearlabel(opcode, INSTR_NAME, registers, bus)
     }

snes-core/src/cpu/instructionstemp/bcs.rs

@@ -1,6 +1,6 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 use super::branch_common;
 
@@ -12,9 +12,7 @@ impl CPUInstruction for BCS {
     fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
         branch_common::do_branch_instr(registers, bus, registers.get_carry_flag());
     }
-}
 
-impl Decode for BCS {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_branch_nearlabel(opcode, INSTR_NAME, registers, bus)
     }

snes-core/src/cpu/instructionstemp/beq.rs

@@ -1,6 +1,6 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 use super::branch_common;
 
@@ -12,9 +12,7 @@ impl CPUInstruction for BEQ {
     fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
         branch_common::do_branch_instr(registers, bus, registers.get_zero_flag());
     }
-}
 
-impl Decode for BEQ {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_branch_nearlabel(opcode, INSTR_NAME, registers, bus)
     }

snes-core/src/cpu/instructionstemp/bit.rs

@@ -1,11 +1,36 @@
 use crate::{cpu::{bus::Bus, registers::Registers}, utils::addressing::AddressingMode};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, read_8bit_from_address, read_16bit_from_address, bit_common};
+use super::{CPUInstruction, bit_common, read_write_common::{read_8bit_from_address, read_16bit_from_address}};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "BIT";
 
+pub struct BIT {
+    pub addressing_mode: AddressingMode,
+}
+
+impl BIT {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_mode() {
+            true => Box::new(BIT16{addressing_mode: self.addressing_mode}),
+            false => Box::new(BIT8{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for BIT {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct BIT8 {
     addressing_mode: AddressingMode,
 }
@@ -21,9 +46,7 @@ impl CPUInstruction for BIT8 {
         let (bytes, cycles) = cycles::increment_cycles_bit(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for BIT8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -44,9 +67,7 @@ impl CPUInstruction for BIT16 {
         let (bytes, cycles) = cycles::increment_cycles_bit(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for BIT16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/bmi.rs

@@ -1,6 +1,6 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 use super::branch_common;
 
@@ -12,9 +12,7 @@ impl CPUInstruction for BMI {
     fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
         branch_common::do_branch_instr(registers, bus, registers.get_negative_flag());
     }
-}
 
-impl Decode for BMI {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_branch_nearlabel(opcode, INSTR_NAME, registers, bus)
     }

snes-core/src/cpu/instructionstemp/bne.rs

@@ -1,6 +1,6 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 use super::branch_common;
 
@@ -12,9 +12,7 @@ impl CPUInstruction for BNE {
     fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
         branch_common::do_branch_instr(registers, bus, !registers.get_zero_flag());
     }
-}
 
-impl Decode for BNE {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_branch_nearlabel(opcode, INSTR_NAME, registers, bus)
     }

snes-core/src/cpu/instructionstemp/bpl.rs

@@ -1,6 +1,6 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 use super::branch_common;
 
@@ -12,9 +12,7 @@ impl CPUInstruction for BPL {
     fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
         branch_common::do_branch_instr(registers, bus, !registers.get_negative_flag());
     }
-}
 
-impl Decode for BPL {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_branch_nearlabel(opcode, INSTR_NAME, registers, bus)
     }

snes-core/src/cpu/instructionstemp/bra.rs

@@ -1,6 +1,6 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 use super::branch_common;
 use crate::cpu::cycles;
@@ -18,9 +18,7 @@ impl CPUInstruction for BRA {
         let (bytes, cycles) = cycles::increment_cycles_branch_taken(page_boundary_crossed);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for BRA {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_branch_nearlabel(opcode, INSTR_NAME, registers, bus)
     }

snes-core/src/cpu/instructionstemp/brk.rs

@@ -1,8 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
-use super::branch_common;
 use super::push_common;
 use crate::cpu::cycles;
 
@@ -20,9 +19,7 @@ impl CPUInstruction for BRK {
         let (bytes, cycles) = cycles::increment_cycles_brk(registers.emulation_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for BRK {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/brl.rs

@@ -1,6 +1,6 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 use crate::cpu::cycles;
 
@@ -22,9 +22,7 @@ impl CPUInstruction for BRL {
         let (bytes, cycles) = cycles::increment_cycles_branch_long();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for BRL {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_absolute(opcode, INSTR_NAME, registers, bus)
     }

snes-core/src/cpu/instructionstemp/bvc.rs

@@ -1,6 +1,6 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 use super::branch_common;
 
@@ -12,9 +12,7 @@ impl CPUInstruction for BVC {
     fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
         branch_common::do_branch_instr(registers, bus, !registers.get_overflow_flag());
     }
-}
 
-impl Decode for BVC {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_branch_nearlabel(opcode, INSTR_NAME, registers, bus)
     }

snes-core/src/cpu/instructionstemp/bvs.rs

@@ -1,6 +1,6 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 use super::branch_common;
 
@@ -12,9 +12,7 @@ impl CPUInstruction for BVS {
     fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
         branch_common::do_branch_instr(registers, bus, registers.get_overflow_flag());
     }
-}
 
-impl Decode for BVS {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_branch_nearlabel(opcode, INSTR_NAME, registers, bus)
     }

snes-core/src/cpu/instructionstemp/clc.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "CLC";
@@ -14,9 +14,7 @@ impl CPUInstruction for CLC {
         let (bytes, cycles) = cycles::increment_cycles_clear();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for CLC {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/cld.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "CLD";
@@ -14,9 +14,7 @@ impl CPUInstruction for CLD {
         let (bytes, cycles) = cycles::increment_cycles_clear();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for CLD {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/cli.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "CLI";
@@ -14,9 +14,7 @@ impl CPUInstruction for CLI {
         let (bytes, cycles) = cycles::increment_cycles_clear();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for CLI {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/clv.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "CLV";
@@ -14,9 +14,7 @@ impl CPUInstruction for CLV {
         let (bytes, cycles) = cycles::increment_cycles_clear();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for CLV {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/cmp.rs

@@ -1,12 +1,37 @@
 use crate::{cpu::{bus::Bus, registers::Registers}, utils::addressing::AddressingMode};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, read_8bit_from_address, read_16bit_from_address};
+use super::{CPUInstruction, read_write_common::{read_8bit_from_address, read_16bit_from_address}};
 use super::decoder_common;
 use super::comp_common;
 
 static INSTR_NAME: &'static str = "CMP";
 
+pub struct CMP {
+    pub addressing_mode: AddressingMode,
+}
+
+impl CMP {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_mode() {
+            true => Box::new(CMP16{addressing_mode: self.addressing_mode}),
+            false => Box::new(CMP8{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for CMP {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct CMP8 {
     addressing_mode: AddressingMode,
 }
@@ -21,9 +46,7 @@ impl CPUInstruction for CMP8 {
         let (bytes, cycles) = cycles::increment_cycles_arithmetic(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for CMP8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -43,9 +66,7 @@ impl CPUInstruction for CMP16 {
         let (bytes, cycles) = cycles::increment_cycles_arithmetic(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for CMP16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/cop.rs

@@ -1,6 +1,6 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 use super::push_common;
 use crate::cpu::cycles;
@@ -19,9 +19,7 @@ impl CPUInstruction for COP {
         let (bytes, cycles) = cycles::increment_cycles_brk(registers.emulation_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for COP {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/cpx.rs

@@ -1,12 +1,37 @@
 use crate::{cpu::{bus::Bus, registers::Registers}, utils::addressing::AddressingMode};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, read_8bit_from_address, read_16bit_from_address};
+use super::{CPUInstruction, read_write_common::{read_8bit_from_address, read_16bit_from_address}};
 use super::decoder_common;
 use super::comp_common;
 
 static INSTR_NAME: &'static str = "CPX";
 
+pub struct CPX {
+    pub addressing_mode: AddressingMode,
+}
+
+impl CPX {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_index() {
+            true => Box::new(CPX16{addressing_mode: self.addressing_mode}),
+            false => Box::new(CPX8{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for CPX {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct CPX8 {
     addressing_mode: AddressingMode,
 }
@@ -21,9 +46,7 @@ impl CPUInstruction for CPX8 {
         let (bytes, cycles) = cycles::increment_cycles_comp_index(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for CPX8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -43,9 +66,7 @@ impl CPUInstruction for CPX16 {
         let (bytes, cycles) = cycles::increment_cycles_comp_index(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for CPX16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/cpy.rs

@@ -1,12 +1,37 @@
 use crate::{cpu::{bus::Bus, registers::Registers}, utils::addressing::AddressingMode};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, read_8bit_from_address, read_16bit_from_address};
+use super::{CPUInstruction, read_write_common::{read_8bit_from_address, read_16bit_from_address}};
 use super::decoder_common;
 use super::comp_common;
 
 static INSTR_NAME: &'static str = "CPY";
 
+pub struct CPY {
+    pub addressing_mode: AddressingMode,
+}
+
+impl CPY {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_index() {
+            true => Box::new(CPY16{addressing_mode: self.addressing_mode}),
+            false => Box::new(CPY8{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for CPY {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct CPY8 {
     addressing_mode: AddressingMode,
 }
@@ -21,9 +46,7 @@ impl CPUInstruction for CPY8 {
         let (bytes, cycles) = cycles::increment_cycles_comp_index(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for CPY8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -43,9 +66,7 @@ impl CPUInstruction for CPY16 {
         let (bytes, cycles) = cycles::increment_cycles_comp_index(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for CPY16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/dec.rs

@@ -1,11 +1,36 @@
 use crate::{cpu::{bus::Bus, registers::Registers}, utils::addressing::AddressingMode};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, write_8bit_to_address, write_16bit_to_address, read_8bit_from_address, read_16bit_from_address, dec_common};
+use super::{CPUInstruction, dec_common, read_write_common::{read_8bit_from_address, write_8bit_to_address, read_16bit_from_address, write_16bit_to_address}};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "DEC";
 
+pub struct DEC {
+    pub addressing_mode: AddressingMode,
+}
+
+impl DEC {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_mode() {
+            true => Box::new(DEC16{addressing_mode: self.addressing_mode}),
+            false => Box::new(DEC8{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for DEC {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct DEC8 {
     addressing_mode: AddressingMode,
 }
@@ -20,9 +45,7 @@ impl CPUInstruction for DEC8 {
         let (bytes, cycles) = cycles::increment_cycles_inc_dec(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for DEC8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -42,9 +65,7 @@ impl CPUInstruction for DEC16 {
         let (bytes, cycles) = cycles::increment_cycles_inc_dec(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for DEC16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/dex.rs

@@ -1,11 +1,34 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, dec_common};
+use super::{CPUInstruction, dec_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "DEX";
 
+pub struct DEX {}
+
+impl DEX {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_index() {
+            true => Box::new(DEX16{}),
+            false => Box::new(DEX8{}),
+        }
+    }
+}
+
+impl CPUInstruction for DEX {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct DEX8 {}
 
 impl CPUInstruction for DEX8 {
@@ -18,9 +41,7 @@ impl CPUInstruction for DEX8 {
         let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for DEX8 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }
@@ -38,9 +59,7 @@ impl CPUInstruction for DEX16 {
         let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for DEX16 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/dey.rs

@@ -1,11 +1,34 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, dec_common};
+use super::{CPUInstruction, dec_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "DEY";
 
+pub struct DEY {}
+
+impl DEY {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_index() {
+            true => Box::new(DEY16{}),
+            false => Box::new(DEY8{}),
+        }
+    }
+}
+
+impl CPUInstruction for DEY {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct DEY8 {}
 
 impl CPUInstruction for DEY8 {
@@ -18,9 +41,7 @@ impl CPUInstruction for DEY8 {
         let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for DEY8 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }
@@ -38,9 +59,7 @@ impl CPUInstruction for DEY16 {
         let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for DEY16 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/eor.rs

@@ -1,11 +1,36 @@
 use crate::{cpu::{bus::Bus, registers::Registers}, utils::{alu, addressing::AddressingMode}};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, read_8bit_from_address, read_16bit_from_address};
+use super::{CPUInstruction, read_write_common::{read_8bit_from_address, read_16bit_from_address}};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "EOR";
 
+pub struct EOR {
+    pub addressing_mode: AddressingMode,
+}
+
+impl EOR {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_mode() {
+            true => Box::new(EOR16{addressing_mode: self.addressing_mode}),
+            false => Box::new(EOR8{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for EOR {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct EOR8 {
     addressing_mode: AddressingMode,
 }
@@ -19,9 +44,7 @@ impl CPUInstruction for EOR8 {
         let (bytes, cycles) = cycles::increment_cycles_bitwise(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for EOR8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -40,9 +63,7 @@ impl CPUInstruction for EOR16 {
         let (bytes, cycles) = cycles::increment_cycles_bitwise(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for EOR16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/inc.rs

@@ -1,11 +1,36 @@
 use crate::{cpu::{bus::Bus, registers::Registers}, utils::addressing::AddressingMode};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, write_8bit_to_address, write_16bit_to_address, read_8bit_from_address, read_16bit_from_address, dec_common};
+use super::{CPUInstruction, dec_common, read_write_common::{read_8bit_from_address, write_8bit_to_address, read_16bit_from_address, write_16bit_to_address}};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "INC";
 
+pub struct INC {
+    pub addressing_mode: AddressingMode,
+}
+
+impl INC {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_mode() {
+            true => Box::new(INC16{addressing_mode: self.addressing_mode}),
+            false => Box::new(INC8{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for INC {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct INC8 {
     addressing_mode: AddressingMode,
 }
@@ -20,9 +45,7 @@ impl CPUInstruction for INC8 {
         let (bytes, cycles) = cycles::increment_cycles_inc_dec(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for INC8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -42,9 +65,7 @@ impl CPUInstruction for INC16 {
         let (bytes, cycles) = cycles::increment_cycles_inc_dec(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for INC16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/inx.rs

@@ -1,11 +1,34 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, dec_common};
+use super::{CPUInstruction, dec_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "INX";
 
+pub struct INX {}
+
+impl INX {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_index() {
+            true => Box::new(INX16{}),
+            false => Box::new(INX8{}),
+        }
+    }
+}
+
+impl CPUInstruction for INX {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct INX8 {}
 
 impl CPUInstruction for INX8 {
@@ -18,9 +41,7 @@ impl CPUInstruction for INX8 {
         let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for INX8 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }
@@ -38,9 +59,7 @@ impl CPUInstruction for INX16 {
         let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for INX16 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/iny.rs

@@ -1,11 +1,34 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, dec_common};
+use super::{CPUInstruction, dec_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "INY";
 
+pub struct INY {}
+
+impl INY {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_index() {
+            true => Box::new(INY16{}),
+            false => Box::new(INY8{}),
+        }
+    }
+}
+
+impl CPUInstruction for INY {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct INY8 {}
 
 impl CPUInstruction for INY8 {
@@ -18,9 +41,7 @@ impl CPUInstruction for INY8 {
         let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for INY8 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }
@@ -38,9 +59,7 @@ impl CPUInstruction for INY16 {
         let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for INY16 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/jmp.rs

@@ -1,14 +1,15 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 use crate::utils::addressing::AddressingMode;
 
-use super::{CPUInstruction, Decode, get_effective_address};
+use super::read_write_common::get_effective_address;
+use super::CPUInstruction;
 use super::decoder_common;
 use crate::cpu::cycles;
 
 static INSTR_NAME: &'static str = "JMP";
 
 pub struct JMP {
-    addressing_mode: AddressingMode,
+    pub addressing_mode: AddressingMode,
 }
 
 impl CPUInstruction for JMP {
@@ -26,9 +27,7 @@ impl CPUInstruction for JMP {
         let (bytes, cycles) = cycles::increment_cycles_jmp(self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for JMP {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/jsr.rs

@@ -1,14 +1,15 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 use crate::utils::addressing::AddressingMode;
 
-use super::{CPUInstruction, Decode, get_effective_address, push_common};
+use super::read_write_common::get_effective_address;
+use super::{CPUInstruction, push_common};
 use super::decoder_common;
 use crate::cpu::cycles;
 
 static INSTR_NAME: &'static str = "JSR";
 
 pub struct JSR {
-    addressing_mode: AddressingMode,
+    pub addressing_mode: AddressingMode,
 }
 
 impl CPUInstruction for JSR {
@@ -40,9 +41,7 @@ impl CPUInstruction for JSR {
             registers.pbr = (effective_address >> 16) as u8;
         }
     }
-}
 
-impl Decode for JSR {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/lda.rs

@@ -3,11 +3,37 @@ use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 use crate::utils::addressing::AddressingMode;
 
-use super::{CPUInstruction, Decode, read_8bit_from_address, bit_common, read_16bit_from_address};
+use super::read_write_common::{read_8bit_from_address, read_16bit_from_address};
+use super::{CPUInstruction, bit_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "LDA";
 
+pub struct LDA {
+    pub addressing_mode: AddressingMode,
+}
+
+impl LDA {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_mode() {
+            true => Box::new(LDA16{addressing_mode: self.addressing_mode}),
+            false => Box::new(LDA8{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for LDA {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct LDA8 {
     addressing_mode: AddressingMode,
 }
@@ -24,9 +50,7 @@ impl CPUInstruction for LDA8 {
         let (bytes, cycles) = cycles::increment_cycles_lda(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for LDA8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -47,9 +71,7 @@ impl CPUInstruction for LDA16 {
         let (bytes, cycles) = cycles::increment_cycles_lda(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for LDA16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/ldx.rs

@@ -3,11 +3,37 @@ use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 use crate::utils::addressing::AddressingMode;
 
-use super::{CPUInstruction, Decode, read_8bit_from_address, bit_common, read_16bit_from_address};
+use super::read_write_common::{read_8bit_from_address, read_16bit_from_address};
+use super::{CPUInstruction, bit_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "LDX";
 
+pub struct LDX {
+    pub addressing_mode: AddressingMode,
+}
+
+impl LDX {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_index() {
+            true => Box::new(LDX{addressing_mode: self.addressing_mode}),
+            false => Box::new(LDX{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for LDX {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct LDX8 {
     addressing_mode: AddressingMode,
 }
@@ -24,9 +50,7 @@ impl CPUInstruction for LDX8 {
         let (bytes, cycles) = cycles::increment_cycles_ld_index(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for LDX8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -47,9 +71,7 @@ impl CPUInstruction for LDX16 {
         let (bytes, cycles) = cycles::increment_cycles_ld_index(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for LDX16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/ldy.rs

@@ -3,11 +3,37 @@ use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 use crate::utils::addressing::AddressingMode;
 
-use super::{CPUInstruction, Decode, read_8bit_from_address, bit_common, read_16bit_from_address};
+use super::read_write_common::{read_8bit_from_address, read_16bit_from_address};
+use super::{CPUInstruction, bit_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "LDY";
 
+pub struct LDY {
+    pub addressing_mode: AddressingMode,
+}
+
+impl LDY {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_index() {
+            true => Box::new(LDY{addressing_mode: self.addressing_mode}),
+            false => Box::new(LDY{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for LDY {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct LDY8 {
     addressing_mode: AddressingMode,
 }
@@ -24,9 +50,7 @@ impl CPUInstruction for LDY8 {
         let (bytes, cycles) = cycles::increment_cycles_ld_index(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for LDY8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -47,9 +71,7 @@ impl CPUInstruction for LDY16 {
         let (bytes, cycles) = cycles::increment_cycles_ld_index(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for LDY16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/lsr.rs

@@ -1,11 +1,36 @@
 use crate::{cpu::{bus::Bus, registers::Registers}, utils::{alu, addressing::AddressingMode}};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, read_8bit_from_address, write_8bit_to_address, read_16bit_from_address, write_16bit_to_address};
+use super::{CPUInstruction, read_write_common::{write_8bit_to_address, read_8bit_from_address, read_16bit_from_address, write_16bit_to_address}};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "LSR";
 
+pub struct LSR {
+    pub addressing_mode: AddressingMode,
+}
+
+impl LSR {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_mode() {
+            true => Box::new(LSR{addressing_mode: self.addressing_mode}),
+            false => Box::new(LSR{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for LSR {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct LSR8 {
     addressing_mode: AddressingMode,
 }
@@ -18,9 +43,7 @@ impl CPUInstruction for LSR8 {
         let (bytes, cycles) = cycles::increment_cycles_shift(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for LSR8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -38,9 +61,7 @@ impl CPUInstruction for LSR16 {
         let (bytes, cycles) = cycles::increment_cycles_shift(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for LSR16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/mapper.rs

@@ -0,0 +1,356 @@
+use crate::{utils::addressing::{AddressingMode, IndexRegister}, cpu::instructionstemp::{adc::ADC, and::AND, asl::ASL, bcc::BCC, bcs::BCS, beq::BEQ, bne::BNE, bmi::BMI, bpl::BPL, bra::BRA, brk::BRK, brl::BRL, bvc::BVC, bvs::BVS, bit::BIT, clc::CLC, cld::CLD, cli::CLI, clv::CLV, cmp::CMP, cop::COP, cpx::CPX, cpy::CPY, dec::DEC, dex::DEX, dey::DEY, eor::EOR, inc::INC, iny::INY, inx::INX, jmp::JMP, jsr::JSR, lda::LDA, ldx::LDX, ldy::LDY, lsr::LSR, mvn::MVN, mvp::MVP, nop::NOP, ora::ORA, pea::PEA, pei::PEI, per::PER, pha::PHA, phb::PHB, phd::PHD, phk::PHK, php::PHP, phx::PHX, phy::PHY, pla::PLA, plb::PLB, pld::PLD, plp::PLP, plx::PLX, ply::PLY, rep::REP, rol::ROL, ror::ROR, rti::RTI, rtl::RTL, rts::RTS, sbc::SBC, sec::SEC, sed::SED, sei::SEI, sep::SEP, sta::STA, stp::STP, stx::STX, sty::STY, stz::STZ, tax::TAX, tay::TAY, tcd::TCD, tcs::TCS, trb::TRB, tsb::TSB, tdc::TDC, tsc::TSC, tsx::TSX, txa::TXA, txs::TXS, txy::TXY, tya::TYA, tyx::TYX, wai::WAI, wdm::WDM, xba::XBA, xce::XCE}};
+
+use super::CPUInstruction;
+
+pub fn map_opcode_to_instruction(opcode: u8) -> Box<dyn CPUInstruction> {
+    type A = AddressingMode;
+    type I = IndexRegister;
+    match opcode {
+        // ADC
+        0x69 => Box::new(ADC{addressing_mode: A::Immediate}),
+        0x6D => Box::new(ADC{addressing_mode: A::Absolute}),
+        0x6F => Box::new(ADC{addressing_mode: A::AbsoluteLong}),
+        0x65 => Box::new(ADC{addressing_mode: A::DirectPage}),
+        0x72 => Box::new(ADC{addressing_mode: A::DirectPageIndirect}),
+        0x67 => Box::new(ADC{addressing_mode: A::DirectPageIndirectLong}),
+        0x7D => Box::new(ADC{addressing_mode: A::AbsoluteIndexed(I::X)}),
+        0x7F => Box::new(ADC{addressing_mode: A::AbsoluteLongIndexed(I::X)}),
+        0x79 => Box::new(ADC{addressing_mode: A::AbsoluteIndexed(I::Y)}),
+        0x75 => Box::new(ADC{addressing_mode: A::DirectPageIndexed(I::X)}),
+        0x61 => Box::new(ADC{addressing_mode: A::DirectPageIndexedIndirect(I::X)}),
+        0x71 => Box::new(ADC{addressing_mode: A::DirectPageIndirectIndexed(I::Y)}),
+        0x77 => Box::new(ADC{addressing_mode: A::DirectPageIndirectLongIndexed(I::Y)}),
+        0x63 => Box::new(ADC{addressing_mode: A::StackRelative}),
+        0x73 => Box::new(ADC{addressing_mode: A::StackRelativeIndirectIndexed(I::Y)}),
+        // AND
+        0x29 => Box::new(AND{addressing_mode: A::Immediate}),
+        0x2D => Box::new(AND{addressing_mode: A::Absolute}),
+        0x2F => Box::new(AND{addressing_mode: A::AbsoluteLong}),
+        0x25 => Box::new(AND{addressing_mode: A::DirectPage}),
+        0x32 => Box::new(AND{addressing_mode: A::DirectPageIndirect}),
+        0x27 => Box::new(AND{addressing_mode: A::DirectPageIndirectLong}),
+        0x3D => Box::new(AND{addressing_mode: A::AbsoluteIndexed(I::X)}),
+        0x3F => Box::new(AND{addressing_mode: A::AbsoluteLongIndexed(I::X)}),
+        0x39 => Box::new(AND{addressing_mode: A::AbsoluteIndexed(I::Y)}),
+        0x35 => Box::new(AND{addressing_mode: A::DirectPageIndexed(I::X)}),
+        0x21 => Box::new(AND{addressing_mode: A::DirectPageIndexedIndirect(I::X)}),
+        0x31 => Box::new(AND{addressing_mode: A::DirectPageIndirectIndexed(I::Y)}),
+        0x37 => Box::new(AND{addressing_mode: A::DirectPageIndirectLongIndexed(I::Y)}),
+        0x23 => Box::new(AND{addressing_mode: A::StackRelative}),
+        0x33 => Box::new(AND{addressing_mode: A::StackRelativeIndirectIndexed(I::Y)}),
+        // ASL
+        0x0A => Box::new(ASL{addressing_mode: A::Accumulator}),
+        0x0E => Box::new(ASL{addressing_mode: A::Absolute}),
+        0x06 => Box::new(ASL{addressing_mode: A::DirectPage}),
+        0x1E => Box::new(ASL{addressing_mode: A::AbsoluteIndexed(I::X)}),
+        0x16 => Box::new(ASL{addressing_mode: A::DirectPageIndexed(I::X)}),
+        // BCC
+        0x90 => Box::new(BCC{}),
+        // BCS
+        0xB0 => Box::new(BCS{}),
+        // BEQ
+        0xF0 => Box::new(BEQ{}),
+        // BNE
+        0xD0 => Box::new(BNE{}),
+        // BMI
+        0x30 => Box::new(BMI{}),
+        // BPL
+        0x10 => Box::new(BPL{}),
+        // BRA
+        0x80 => Box::new(BRA{}),
+        // BRK
+        0x00 => Box::new(BRK{}),
+        // BRL
+        0x82 => Box::new(BRL{}),
+        // BVC
+        0x50 => Box::new(BVC{}),
+        // BVS
+        0x70 => Box::new(BVS{}),
+        // BIT
+        0x89 => Box::new(BIT{addressing_mode: A::Immediate}),
+        0x2C => Box::new(BIT{addressing_mode: A::Absolute}),
+        0x24 => Box::new(BIT{addressing_mode: A::DirectPage}),
+        0x3C => Box::new(BIT{addressing_mode: A::AbsoluteIndexed(I::X)}),
+        0x34 => Box::new(BIT{addressing_mode: A::DirectPageIndexed(I::X)}),
+        // CLC
+        0x18 => Box::new(CLC{}),
+        // CLD
+        0xD8 => Box::new(CLD{}),
+        // CLI
+        0x58 => Box::new(CLI{}),
+        // CLV
+        0xB8 => Box::new(CLV{}),
+        // CMP
+        0xC9 => Box::new(CMP{addressing_mode: A::Immediate}),
+        0xCD => Box::new(CMP{addressing_mode: A::Absolute}),
+        0xCF => Box::new(CMP{addressing_mode: A::AbsoluteLong}),
+        0xC5 => Box::new(CMP{addressing_mode: A::DirectPage}),
+        0xD2 => Box::new(CMP{addressing_mode: A::DirectPageIndirect}),
+        0xC7 => Box::new(CMP{addressing_mode: A::DirectPageIndirectLong}),
+        0xDD => Box::new(CMP{addressing_mode: A::AbsoluteIndexed(I::X)}),
+        0xDF => Box::new(CMP{addressing_mode: A::AbsoluteLongIndexed(I::X)}),
+        0xD9 => Box::new(CMP{addressing_mode: A::AbsoluteIndexed(I::Y)}),
+        0xD5 => Box::new(CMP{addressing_mode: A::DirectPageIndexed(I::X)}),
+        0xC1 => Box::new(CMP{addressing_mode: A::DirectPageIndexedIndirect(I::X)}),
+        0xD1 => Box::new(CMP{addressing_mode: A::DirectPageIndirectIndexed(I::Y)}),
+        0xD7 => Box::new(CMP{addressing_mode: A::DirectPageIndirectLongIndexed(I::Y)}),
+        0xC3 => Box::new(CMP{addressing_mode: A::StackRelative}),
+        0xD3 => Box::new(CMP{addressing_mode: A::StackRelativeIndirectIndexed(I::Y)}),
+        // COP
+        0x02 => Box::new(COP{}),
+        // CPX
+        0xE0 => Box::new(CPX{addressing_mode: A::Immediate}),
+        0xEC => Box::new(CPX{addressing_mode: A::Absolute}),
+        0xE4 => Box::new(CPX{addressing_mode: A::DirectPage}),
+        // CPY
+        0xC0 => Box::new(CPY{addressing_mode: A::Immediate}),
+        0xCC => Box::new(CPY{addressing_mode: A::Absolute}),
+        0xC4 => Box::new(CPY{addressing_mode: A::DirectPage}),
+        // DEC
+        0x3A => Box::new(DEC{addressing_mode: A::Accumulator}),
+        0xCE => Box::new(DEC{addressing_mode: A::Absolute}),
+        0xC6 => Box::new(DEC{addressing_mode: A::DirectPage}),
+        0xDE => Box::new(DEC{addressing_mode: A::AbsoluteIndexed(I::X)}),
+        0xD6 => Box::new(DEC{addressing_mode: A::DirectPageIndexed(I::X)}),
+        // DEX
+        0xCA => Box::new(DEX{}),
+        // DEY
+        0x88 => Box::new(DEY{}),
+        // EOR
+        0x49 => Box::new(EOR{addressing_mode: A::Immediate}),
+        0x4D => Box::new(EOR{addressing_mode: A::Absolute}),
+        0x4F => Box::new(EOR{addressing_mode: A::AbsoluteLong}),
+        0x45 => Box::new(EOR{addressing_mode: A::DirectPage}),
+        0x52 => Box::new(EOR{addressing_mode: A::DirectPageIndirect}),
+        0x47 => Box::new(EOR{addressing_mode: A::DirectPageIndirectLong}),
+        0x5D => Box::new(EOR{addressing_mode: A::AbsoluteIndexed(I::X)}),
+        0x5F => Box::new(EOR{addressing_mode: A::AbsoluteLongIndexed(I::X)}),
+        0x59 => Box::new(EOR{addressing_mode: A::AbsoluteIndexed(I::Y)}),
+        0x55 => Box::new(EOR{addressing_mode: A::DirectPageIndexed(I::X)}),
+        0x41 => Box::new(EOR{addressing_mode: A::DirectPageIndexedIndirect(I::X)}),
+        0x51 => Box::new(EOR{addressing_mode: A::DirectPageIndirectIndexed(I::Y)}),
+        0x57 => Box::new(EOR{addressing_mode: A::DirectPageIndirectLongIndexed(I::Y)}),
+        0x43 => Box::new(EOR{addressing_mode: A::StackRelative}),
+        0x53 => Box::new(EOR{addressing_mode: A::StackRelativeIndirectIndexed(I::Y)}),
+        // INC
+        0x1A => Box::new(INC{addressing_mode: A::Accumulator}),
+        0xEE => Box::new(INC{addressing_mode: A::Absolute}),
+        0xE6 => Box::new(INC{addressing_mode: A::DirectPage}),
+        0xFE => Box::new(INC{addressing_mode: A::AbsoluteIndexed(I::X)}),
+        0xF6 => Box::new(INC{addressing_mode: A::DirectPageIndexed(I::X)}),
+        // INX
+        0xE8 => Box::new(INX{}),
+        // INY
+        0xC8 => Box::new(INY{}),
+        // JMP
+        0x4C => Box::new(JMP{addressing_mode: A::Absolute}),
+        0x6C => Box::new(JMP{addressing_mode: A::AbsoluteIndirect}),
+        0x7C => Box::new(JMP{addressing_mode: A::AbsoluteIndexedIndirect(I::X)}),
+        0x5C => Box::new(JMP{addressing_mode: A::AbsoluteLong}),
+        0xDC => Box::new(JMP{addressing_mode: A::AbsoluteIndirectLong}),
+        // JSR 
+        0x20 => Box::new(JSR{addressing_mode: A::Absolute}),
+        0xFC => Box::new(JSR{addressing_mode: A::AbsoluteIndexedIndirect(I::X)}),
+        0x22 => Box::new(JSR{addressing_mode: A::AbsoluteLong}), // same as JSL
+        // LDA
+        0xA9 => Box::new(LDA{addressing_mode: A::Immediate}),
+        0xAD => Box::new(LDA{addressing_mode: A::Absolute}),
+        0xAF => Box::new(LDA{addressing_mode: A::AbsoluteLong}),
+        0xA5 => Box::new(LDA{addressing_mode: A::DirectPage}),
+        0xB2 => Box::new(LDA{addressing_mode: A::DirectPageIndirect}),
+        0xA7 => Box::new(LDA{addressing_mode: A::DirectPageIndirectLong}),
+        0xBD => Box::new(LDA{addressing_mode: A::AbsoluteIndexed(I::X)}),
+        0xBF => Box::new(LDA{addressing_mode: A::AbsoluteLongIndexed(I::X)}),
+        0xB9 => Box::new(LDA{addressing_mode: A::AbsoluteIndexed(I::Y)}),
+        0xB5 => Box::new(LDA{addressing_mode: A::DirectPageIndexed(I::X)}),
+        0xA1 => Box::new(LDA{addressing_mode: A::DirectPageIndexedIndirect(I::X)}),
+        0xB1 => Box::new(LDA{addressing_mode: A::DirectPageIndirectIndexed(I::Y)}),
+        0xB7 => Box::new(LDA{addressing_mode: A::DirectPageIndirectLongIndexed(I::Y)}),
+        0xA3 => Box::new(LDA{addressing_mode: A::StackRelative}),
+        0xB3 => Box::new(LDA{addressing_mode: A::StackRelativeIndirectIndexed(I::Y)}),
+        // LDX
+        0xA2 => Box::new(LDX{addressing_mode: A::Immediate}),
+        0xAE => Box::new(LDX{addressing_mode: A::Absolute}),
+        0xA6 => Box::new(LDX{addressing_mode: A::DirectPage}),
+        0xBE => Box::new(LDX{addressing_mode: A::AbsoluteIndexed(I::Y)}),
+        0xB6 => Box::new(LDX{addressing_mode: A::DirectPageIndexed(I::Y)}),
+        // LDY
+        0xA0 => Box::new(LDY{addressing_mode: A::Immediate}),
+        0xAC => Box::new(LDY{addressing_mode: A::Absolute}),
+        0xA4 => Box::new(LDY{addressing_mode: A::DirectPage}),
+        0xB4 => Box::new(LDY{addressing_mode: A::AbsoluteIndexed(I::Y)}),
+        0xBC => Box::new(LDY{addressing_mode: A::DirectPageIndexed(I::Y)}),
+        // LSR
+        0x4A => Box::new(LSR{addressing_mode: A::Accumulator}),
+        0x4E => Box::new(LSR{addressing_mode: A::Absolute}),
+        0x46 => Box::new(LSR{addressing_mode: A::DirectPage}),
+        0x5E => Box::new(LSR{addressing_mode: A::AbsoluteIndexed(I::X)}),
+        0x56 => Box::new(LSR{addressing_mode: A::DirectPageIndexed(I::X)}),
+        // MVN
+        0x54 => Box::new(MVN{}),
+        // MVP
+        0x44 => Box::new(MVP{}),
+        // NOP
+        0xEA => Box::new(NOP{}),
+        // ORA
+        0x09 => Box::new(ORA{addressing_mode: A::Immediate}),
+        0x0D => Box::new(ORA{addressing_mode: A::Absolute}),
+        0x0F => Box::new(ORA{addressing_mode: A::AbsoluteLong}),
+        0x05 => Box::new(ORA{addressing_mode: A::DirectPage}),
+        0x12 => Box::new(ORA{addressing_mode: A::DirectPageIndirect}),
+        0x07 => Box::new(ORA{addressing_mode: A::DirectPageIndirectLong}),
+        0x1D => Box::new(ORA{addressing_mode: A::AbsoluteIndexed(I::X)}),
+        0x1F => Box::new(ORA{addressing_mode: A::AbsoluteLongIndexed(I::X)}),
+        0x19 => Box::new(ORA{addressing_mode: A::AbsoluteIndexed(I::Y)}),
+        0x15 => Box::new(ORA{addressing_mode: A::DirectPageIndexed(I::X)}),
+        0x01 => Box::new(ORA{addressing_mode: A::DirectPageIndexedIndirect(I::X)}),
+        0x11 => Box::new(ORA{addressing_mode: A::DirectPageIndirectIndexed(I::Y)}),
+        0x17 => Box::new(ORA{addressing_mode: A::DirectPageIndirectLongIndexed(I::Y)}),
+        0x03 => Box::new(ORA{addressing_mode: A::StackRelative}),
+        0x13 => Box::new(ORA{addressing_mode: A::StackRelativeIndirectIndexed(I::Y)}),
+        // PEA
+        0xF4 => Box::new(PEA{}),
+        // PEI
+        0xD4 => Box::new(PEI{}),
+        // PER
+        0x62 => Box::new(PER{}),
+        // PHA
+        0x48 => Box::new(PHA{}),
+        // PHB
+        0x8B => Box::new(PHB{}),
+        // PHD
+        0x0B => Box::new(PHD{}),
+        // PHK
+        0x4B => Box::new(PHK{}),
+        // PHP
+        0x08 => Box::new(PHP{}),
+        // PHX
+        0xDA => Box::new(PHX{}),
+        // PHY
+        0x5A => Box::new(PHY{}),
+        // PLA
+        0x68 => Box::new(PLA{}),
+        // PLB
+        0xAB => Box::new(PLB{}),
+        // PLD
+        0x2B => Box::new(PLD{}),
+        // PLP
+        0x28 => Box::new(PLP{}),
+        // PLX
+        0xFA => Box::new(PLX{}),
+        // PLY
+        0x7A => Box::new(PLY{}),
+        // REP
+        0xC2 => Box::new(REP{}),
+        // ROL
+        0x2A => Box::new(ROL{addressing_mode: AddressingMode::Accumulator}),
+        0x2E => Box::new(ROL{addressing_mode: AddressingMode::Absolute}),
+        0x26 => Box::new(ROL{addressing_mode: AddressingMode::DirectPage}),
+        0x3E => Box::new(ROL{addressing_mode: AddressingMode::AbsoluteIndexed(I::X)}),
+        0x36 => Box::new(ROL{addressing_mode: AddressingMode::DirectPageIndexed(I::X)}),
+        // ROR
+        0x6A => Box::new(ROR{addressing_mode: AddressingMode::Accumulator}),
+        0x6E => Box::new(ROR{addressing_mode: AddressingMode::Absolute}),
+        0x66 => Box::new(ROR{addressing_mode: AddressingMode::DirectPage}),
+        0x7E => Box::new(ROR{addressing_mode: AddressingMode::AbsoluteIndexed(I::X)}),
+        0x76 => Box::new(ROR{addressing_mode: AddressingMode::DirectPageIndexed(I::X)}),
+        // RTI
+        0x40 => Box::new(RTI{}),
+        // RTL
+        0x6B => Box::new(RTL{}),
+        // RTS
+        0x60 => Box::new(RTS{}),
+        // SBC
+        0xE9 => Box::new(SBC{addressing_mode: A::Immediate}),
+        0xED => Box::new(SBC{addressing_mode: A::Absolute}),
+        0xEF => Box::new(SBC{addressing_mode: A::AbsoluteLong}),
+        0xE5 => Box::new(SBC{addressing_mode: A::DirectPage}),
+        0xF2 => Box::new(SBC{addressing_mode: A::DirectPageIndirect}),
+        0xE7 => Box::new(SBC{addressing_mode: A::DirectPageIndirectLong}),
+        0xFD => Box::new(SBC{addressing_mode: A::AbsoluteIndexed(I::X)}),
+        0xFF => Box::new(SBC{addressing_mode: A::AbsoluteLongIndexed(I::X)}),
+        0xF9 => Box::new(SBC{addressing_mode: A::AbsoluteIndexed(I::Y)}),
+        0xF5 => Box::new(SBC{addressing_mode: A::DirectPageIndexed(I::X)}),
+        0xE1 => Box::new(SBC{addressing_mode: A::DirectPageIndexedIndirect(I::X)}),
+        0xF1 => Box::new(SBC{addressing_mode: A::DirectPageIndirectIndexed(I::Y)}),
+        0xF7 => Box::new(SBC{addressing_mode: A::DirectPageIndirectLongIndexed(I::Y)}),
+        0xE3 => Box::new(SBC{addressing_mode: A::StackRelative}),
+        0xF3 => Box::new(SBC{addressing_mode: A::StackRelativeIndirectIndexed(I::Y)}),
+        // SEC
+        0x38 => Box::new(SEC{}),
+        // SED
+        0xF8 => Box::new(SED{}),
+        // SEI
+        0x78 => Box::new(SEI{}),
+        // SEP
+        0xE2 => Box::new(SEP{}),
+        // STA
+        0x8D => Box::new(STA{addressing_mode: A::Absolute}),
+        0x8F => Box::new(STA{addressing_mode: A::AbsoluteLong}),
+        0x85 => Box::new(STA{addressing_mode: A::DirectPage}),
+        0x92 => Box::new(STA{addressing_mode: A::DirectPageIndirect}),
+        0x87 => Box::new(STA{addressing_mode: A::DirectPageIndirectLong}),
+        0x9D => Box::new(STA{addressing_mode: A::AbsoluteIndexed(I::X)}),
+        0x9F => Box::new(STA{addressing_mode: A::AbsoluteLongIndexed(I::X)}),
+        0x99 => Box::new(STA{addressing_mode: A::AbsoluteIndexed(I::Y)}),
+        0x95 => Box::new(STA{addressing_mode: A::DirectPageIndexed(I::X)}),
+        0x81 => Box::new(STA{addressing_mode: A::DirectPageIndexedIndirect(I::X)}),
+        0x91 => Box::new(STA{addressing_mode: A::DirectPageIndirectIndexed(I::Y)}),
+        0x97 => Box::new(STA{addressing_mode: A::DirectPageIndirectLongIndexed(I::Y)}),
+        0x83 => Box::new(STA{addressing_mode: A::StackRelative}),
+        0x93 => Box::new(STA{addressing_mode: A::StackRelativeIndirectIndexed(I::Y)}),
+        // STP
+        0xDB => Box::new(STP{}),
+        // STX
+        0x8E => Box::new(STX{addressing_mode: A::Absolute}),
+        0x86 => Box::new(STX{addressing_mode: A::DirectPage}),
+        0x96 => Box::new(STX{addressing_mode: A::DirectPageIndexed(I::Y)}),
+        // STY
+        0x8C => Box::new(STY{addressing_mode: A::Absolute}),
+        0x84 => Box::new(STY{addressing_mode: A::DirectPage}),
+        0x94 => Box::new(STY{addressing_mode: A::DirectPageIndexed(I::X)}),
+        // STZ
+        0x9C => Box::new(STZ{addressing_mode: A::Absolute}),
+        0x64 => Box::new(STZ{addressing_mode: A::DirectPage}),
+        0x9E => Box::new(STZ{addressing_mode: A::AbsoluteIndexed(I::X)}),
+        0x74 => Box::new(STZ{addressing_mode: A::DirectPageIndexed(I::X)}),
+        // TAX
+        0xAA => Box::new(TAX{}),
+        // TAY
+        0xA8 => Box::new(TAY{}),
+        // TCD
+        0x5B => Box::new(TCD{}),
+        // TCS
+        0x1B => Box::new(TCS{}),
+        // TDC
+        0x7B => Box::new(TDC{}),
+        // TRB
+        0x1C => Box::new(TRB{addressing_mode: A::Absolute}),
+        0x14 => Box::new(TRB{addressing_mode: A::DirectPage}),
+        // TSB
+        0x0C => Box::new(TSB{addressing_mode: A::Absolute}),
+        0x04 => Box::new(TSB{addressing_mode: A::DirectPage}),
+        // TSC
+        0x3B => Box::new(TSC{}),
+        // TSX
+        0xBA => Box::new(TSX{}),
+        // TXA
+        0x8A => Box::new(TXA{}),
+        // TXS
+        0x9A => Box::new(TXS{}),
+        // TXY
+        0x9B => Box::new(TXY{}),
+        // TYA
+        0x98 => Box::new(TYA{}),
+        // TYX
+        0xBB => Box::new(TYX{}),
+        // WAI
+        0xCB => Box::new(WAI{}),
+        // WDM
+        0x42 => Box::new(WDM{}),
+        // XBA
+        0xEB => Box::new(XBA{}),
+        // XCE
+        0xFB => Box::new(XCE{}),
+    }
+}

snes-core/src/cpu/instructionstemp/mod.rs

@@ -1,6 +1,5 @@
 use crate::cpu::bus::Bus;
 use crate::cpu::registers::Registers;
-use crate::utils::addressing::AddressingMode;
 
 pub mod adc;
 pub mod and;
@@ -100,77 +99,10 @@ pub mod push_common;
 pub mod pull_common;
 pub mod comp_common;
 pub mod move_common;
+pub mod read_write_common;
+pub mod mapper;
 
 pub trait CPUInstruction {
     fn execute(&self, registers: &mut Registers, bus: &mut Bus);
-}
-
-pub trait Decode {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String;
 }
-
-pub fn get_effective_address(registers: &Registers, bus: &mut Bus, addressing_mode: AddressingMode) -> u32 {
-    addressing_mode.effective_address(
-        bus,
-        registers.get_pc_address(),
-        registers.d,
-        registers.sp,
-        registers.x, registers.y,
-    )
-}
-
-pub fn read_8bit_from_address(registers: &Registers, bus: &mut Bus, addressing_mode: AddressingMode) -> u8 {
-    match addressing_mode {
-        AddressingMode::Accumulator => registers.a as u8,
-        _ => addressing_mode.value_8bit(
-            bus,
-            registers.get_pc_address(),
-            registers.d,
-            registers.sp,
-            registers.x,
-            registers.y,
-        )
-    }
-}
-
-pub fn read_16bit_from_address(registers: &Registers, bus: &mut Bus, addressing_mode: AddressingMode) -> u16 {
-    match addressing_mode {
-        AddressingMode::Accumulator => registers.a,
-        _ => addressing_mode.value_16bit(
-            bus,
-            registers.get_pc_address(),
-            registers.d,
-            registers.sp,
-            registers.x,
-            registers.y,
-        )
-    }
-}
-
-pub fn write_8bit_to_address(registers: &mut Registers, bus: &mut Bus, addressing_mode: AddressingMode, value: u8) {
-    match addressing_mode {
-        AddressingMode::Accumulator => registers.set_low_a(value),
-        _ => addressing_mode.store_8bit(
-            bus,
-            registers.get_pc_address(),
-            registers.d,
-            registers.sp,
-            registers.x, registers.y,
-            value,
-        ),
-    };
-}
-
-pub fn write_16bit_to_address(registers: &mut Registers, bus: &mut Bus, addressing_mode: AddressingMode, value: u16) {
-    match addressing_mode {
-        AddressingMode::Accumulator => registers.a = value,
-        _ => addressing_mode.store_16bit(
-            bus,
-            registers.get_pc_address(),
-            registers.d,
-            registers.sp,
-            registers.x, registers.y,
-            value,
-        ),
-    };
-}

snes-core/src/cpu/instructionstemp/mvn.rs

@@ -1,6 +1,6 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode, move_common};
+use super::{CPUInstruction, move_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "MVN";
@@ -11,9 +11,7 @@ impl CPUInstruction for MVN {
     fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
         move_common::do_move(registers, bus, true);
     }
-}
 
-impl Decode for MVN {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_move(opcode, INSTR_NAME, registers, bus)
     }

snes-core/src/cpu/instructionstemp/mvp.rs

@@ -1,6 +1,6 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode, move_common};
+use super::{CPUInstruction, move_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "MVP";
@@ -11,9 +11,7 @@ impl CPUInstruction for MVP {
     fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
         move_common::do_move(registers, bus, false);
     }
-}
 
-impl Decode for MVP {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_move(opcode, INSTR_NAME, registers, bus)
     }

snes-core/src/cpu/instructionstemp/nop.rs

@@ -1,7 +1,7 @@
 use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "NOP";
@@ -13,9 +13,7 @@ impl CPUInstruction for NOP {
         let (bytes, cycles) = cycles::increment_cycles_nop();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for NOP {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/ora.rs

@@ -1,11 +1,36 @@
 use crate::{cpu::{bus::Bus, registers::Registers}, utils::{alu, addressing::AddressingMode}};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, read_8bit_from_address, read_16bit_from_address};
+use super::{CPUInstruction, read_write_common::{read_8bit_from_address, read_16bit_from_address}};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "ORA";
 
+pub struct ORA {
+    pub addressing_mode: AddressingMode,
+}
+
+impl ORA {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_mode() {
+            true => Box::new(ORA16{addressing_mode: self.addressing_mode}),
+            false => Box::new(ORA8{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for ORA {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct ORA8 {
     addressing_mode: AddressingMode,
 }
@@ -19,9 +44,7 @@ impl CPUInstruction for ORA8 {
         let (bytes, cycles) = cycles::increment_cycles_bitwise(registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for ORA8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -40,9 +63,7 @@ impl CPUInstruction for ORA16 {
         let (bytes, cycles) = cycles::increment_cycles_bitwise(registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for ORA16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/pea.rs

@@ -2,7 +2,8 @@ use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
 use crate::utils::addressing::AddressingMode;
-use super::{CPUInstruction, Decode, get_effective_address, push_common};
+use super::read_write_common::get_effective_address;
+use super::{CPUInstruction, push_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "PEA";
@@ -16,9 +17,7 @@ impl CPUInstruction for PEA {
         let (bytes, cycles) = cycles::increment_cycles_pea();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for PEA {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_absolute(opcode, INSTR_NAME, registers, bus)
     }

snes-core/src/cpu/instructionstemp/pei.rs

@@ -2,7 +2,8 @@ use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
 use crate::utils::addressing::AddressingMode;
-use super::{CPUInstruction, Decode, get_effective_address, push_common};
+use super::read_write_common::get_effective_address;
+use super::{CPUInstruction, push_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "PEI";
@@ -16,9 +17,7 @@ impl CPUInstruction for PEI {
         let (bytes, cycles) = cycles::increment_cycles_pei(registers);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for PEI {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_direct_page_indirect(opcode, INSTR_NAME, registers, bus)
     }

snes-core/src/cpu/instructionstemp/per.rs

@@ -2,7 +2,8 @@ use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
 use crate::utils::addressing::AddressingMode;
-use super::{CPUInstruction, Decode, get_effective_address, push_common};
+use super::read_write_common::get_effective_address;
+use super::{CPUInstruction, push_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "PER";
@@ -21,9 +22,7 @@ impl CPUInstruction for PER {
         };
         push_common::do_push(registers, bus, &[(address >> 8) as u8, address as u8]);
     }
-}
 
-impl Decode for PER {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_absolute(opcode, INSTR_NAME, registers, bus)
     }

snes-core/src/cpu/instructionstemp/pha.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, push_common};
+use super::{CPUInstruction, push_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "PHA";
@@ -19,9 +19,7 @@ impl CPUInstruction for PHA {
         let (bytes, cycles) = cycles::increment_cycles_pha(registers.is_16bit_mode());
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for PHA {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/phb.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, push_common};
+use super::{CPUInstruction, push_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "PHB";
@@ -14,9 +14,7 @@ impl CPUInstruction for PHB {
         let (bytes, cycles) = cycles::increment_cycles_phb();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for PHB {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/phd.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, push_common};
+use super::{CPUInstruction, push_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "PHD";
@@ -15,9 +15,7 @@ impl CPUInstruction for PHD {
         let (bytes, cycles) = cycles::increment_cycles_phd();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for PHD {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/phk.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, push_common};
+use super::{CPUInstruction, push_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "PHK";
@@ -14,9 +14,7 @@ impl CPUInstruction for PHK {
         let (bytes, cycles) = cycles::increment_cycles_phk();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for PHK {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/php.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, push_common};
+use super::{CPUInstruction, push_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "PHP";
@@ -14,9 +14,7 @@ impl CPUInstruction for PHP {
         let (bytes, cycles) = cycles::increment_cycles_php();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for PHP {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/phx.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, push_common};
+use super::{CPUInstruction, push_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "PHX";
@@ -19,9 +19,7 @@ impl CPUInstruction for PHX {
         let (bytes, cycles) = cycles::increment_cycles_push_index(registers.is_16bit_index());
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for PHX {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/phy.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, push_common};
+use super::{CPUInstruction, push_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "PHY";
@@ -19,9 +19,7 @@ impl CPUInstruction for PHY {
         let (bytes, cycles) = cycles::increment_cycles_push_index(registers.is_16bit_index());
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for PHY {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/pla.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, pull_common};
+use super::{CPUInstruction, pull_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "PLA";
@@ -20,9 +20,7 @@ impl CPUInstruction for PLA {
         let (bytes, cycles) = cycles::increment_cycles_pla(registers.is_16bit_mode());
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for PLA {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/plb.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, pull_common};
+use super::{CPUInstruction, pull_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "PLB";
@@ -14,9 +14,7 @@ impl CPUInstruction for PLB {
         let (bytes, cycles) = cycles::increment_cycles_plb();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for PLB {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/pld.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, pull_common};
+use super::{CPUInstruction, pull_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "PLD";
@@ -15,9 +15,7 @@ impl CPUInstruction for PLD {
         let (bytes, cycles) = cycles::increment_cycles_pld();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for PLD {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/plp.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, pull_common};
+use super::{CPUInstruction, pull_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "PLP";
@@ -15,9 +15,7 @@ impl CPUInstruction for PLP {
         let (bytes, cycles) = cycles::increment_cycles_plp();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for PLP {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/plx.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, pull_common};
+use super::{CPUInstruction, pull_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "PLX";
@@ -20,9 +20,7 @@ impl CPUInstruction for PLX {
         let (bytes, cycles) = cycles::increment_cycles_pl_index(registers.is_16bit_index());
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for PLX {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/ply.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, pull_common};
+use super::{CPUInstruction, pull_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "PLY";
@@ -20,9 +20,7 @@ impl CPUInstruction for PLY {
         let (bytes, cycles) = cycles::increment_cycles_pl_index(registers.is_16bit_index());
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for PLY {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/read_write_common.rs

@@ -0,0 +1,67 @@
+use crate::{cpu::{registers::Registers, bus::Bus}, utils::addressing::AddressingMode};
+
+pub fn get_effective_address(registers: &Registers, bus: &mut Bus, addressing_mode: AddressingMode) -> u32 {
+    addressing_mode.effective_address(
+        bus,
+        registers.get_pc_address(),
+        registers.d,
+        registers.sp,
+        registers.x, registers.y,
+    )
+}
+
+pub fn read_8bit_from_address(registers: &Registers, bus: &mut Bus, addressing_mode: AddressingMode) -> u8 {
+    match addressing_mode {
+        AddressingMode::Accumulator => registers.a as u8,
+        _ => addressing_mode.value_8bit(
+            bus,
+            registers.get_pc_address(),
+            registers.d,
+            registers.sp,
+            registers.x,
+            registers.y,
+        )
+    }
+}
+
+pub fn read_16bit_from_address(registers: &Registers, bus: &mut Bus, addressing_mode: AddressingMode) -> u16 {
+    match addressing_mode {
+        AddressingMode::Accumulator => registers.a,
+        _ => addressing_mode.value_16bit(
+            bus,
+            registers.get_pc_address(),
+            registers.d,
+            registers.sp,
+            registers.x,
+            registers.y,
+        )
+    }
+}
+
+pub fn write_8bit_to_address(registers: &mut Registers, bus: &mut Bus, addressing_mode: AddressingMode, value: u8) {
+    match addressing_mode {
+        AddressingMode::Accumulator => registers.set_low_a(value),
+        _ => addressing_mode.store_8bit(
+            bus,
+            registers.get_pc_address(),
+            registers.d,
+            registers.sp,
+            registers.x, registers.y,
+            value,
+        ),
+    };
+}
+
+pub fn write_16bit_to_address(registers: &mut Registers, bus: &mut Bus, addressing_mode: AddressingMode, value: u16) {
+    match addressing_mode {
+        AddressingMode::Accumulator => registers.a = value,
+        _ => addressing_mode.store_16bit(
+            bus,
+            registers.get_pc_address(),
+            registers.d,
+            registers.sp,
+            registers.x, registers.y,
+            value,
+        ),
+    };
+}

snes-core/src/cpu/instructionstemp/rep.rs

@@ -2,7 +2,8 @@ use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
 use crate::utils::addressing::AddressingMode;
-use super::{CPUInstruction, Decode, read_8bit_from_address};
+use super::read_write_common::read_8bit_from_address;
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "REP";
@@ -16,9 +17,7 @@ impl CPUInstruction for REP {
         let (bytes, cycles) = cycles::increment_cycles_rep();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for REP {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_8bit_immediate(opcode, INSTR_NAME, registers, bus)
     }

snes-core/src/cpu/instructionstemp/rol.rs

@@ -1,11 +1,36 @@
 use crate::{cpu::{bus::Bus, registers::Registers}, utils::{alu, addressing::AddressingMode}};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, read_8bit_from_address, read_16bit_from_address, write_8bit_to_address, write_16bit_to_address};
+use super::{CPUInstruction, read_write_common::{read_8bit_from_address, write_8bit_to_address, read_16bit_from_address, write_16bit_to_address}};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "ROL";
 
+pub struct ROL {
+    pub addressing_mode: AddressingMode,
+}
+
+impl ROL {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_mode() {
+            true => Box::new(ROL16{addressing_mode: self.addressing_mode}),
+            false => Box::new(ROL8{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for ROL {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct ROL8 {
     addressing_mode: AddressingMode,
 }
@@ -19,9 +44,7 @@ impl CPUInstruction for ROL8 {
         let (bytes, cycles) = cycles::increment_cycles_shift(registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for ROL8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -40,9 +63,7 @@ impl CPUInstruction for ROL16 {
         let (bytes, cycles) = cycles::increment_cycles_shift(registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for ROL16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/ror.rs

@@ -1,11 +1,36 @@
 use crate::{cpu::{bus::Bus, registers::Registers}, utils::{alu, addressing::AddressingMode}};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, read_8bit_from_address, read_16bit_from_address, write_8bit_to_address, write_16bit_to_address};
+use super::{CPUInstruction, read_write_common::{read_8bit_from_address, write_8bit_to_address, read_16bit_from_address, write_16bit_to_address}};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "ROR";
 
+pub struct ROR {
+    pub addressing_mode: AddressingMode,
+}
+
+impl ROR {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_mode() {
+            true => Box::new(ROR16{addressing_mode: self.addressing_mode}),
+            false => Box::new(ROR8{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for ROR {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct ROR8 {
     addressing_mode: AddressingMode,
 }
@@ -19,9 +44,7 @@ impl CPUInstruction for ROR8 {
         let (bytes, cycles) = cycles::increment_cycles_shift(registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for ROR8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -40,9 +63,7 @@ impl CPUInstruction for ROR16 {
         let (bytes, cycles) = cycles::increment_cycles_shift(registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for ROR16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/rti.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, pull_common};
+use super::{CPUInstruction, pull_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "RTI";
@@ -19,9 +19,7 @@ impl CPUInstruction for RTI {
         let (bytes, cycles) = cycles::increment_cycles_return_interrupt(registers.emulation_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for RTI {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/rtl.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, pull_common};
+use super::{CPUInstruction, pull_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "RTL";
@@ -17,9 +17,7 @@ impl CPUInstruction for RTL {
         let (bytes, cycles) = cycles::increment_cycles_return_subroutine();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for RTL {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/rts.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, pull_common};
+use super::{CPUInstruction, pull_common};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "RTS";
@@ -16,9 +16,7 @@ impl CPUInstruction for RTS {
         let (bytes, cycles) = cycles::increment_cycles_return_subroutine();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for RTS {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/sbc.rs

@@ -1,11 +1,43 @@
 use crate::{cpu::{bus::Bus, registers::Registers}, utils::{alu, addressing::AddressingMode}};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode, read_8bit_from_address, read_16bit_from_address};
+use super::{CPUInstruction, read_write_common::{read_8bit_from_address, read_16bit_from_address}};
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "SBC";
 
+pub struct SBC {
+    pub addressing_mode: AddressingMode,
+}
+
+impl SBC {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        let is_decimal_mode = registers.get_decimal_mode_flag();
+        match registers.is_16bit_mode() {
+            true => match is_decimal_mode {
+                true => Box::new(SBC16BCD{addressing_mode: self.addressing_mode}),
+                false => Box::new(SBC16BIN{addressing_mode: self.addressing_mode}),
+            }
+            false => match is_decimal_mode {
+                true => Box::new(SBC8BCD{addressing_mode: self.addressing_mode}),
+                false => Box::new(SBC8BIN{addressing_mode: self.addressing_mode}),
+            }
+        }
+    }
+}
+
+impl CPUInstruction for SBC {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct SBC8BIN {
     addressing_mode: AddressingMode,
 }
@@ -22,9 +54,7 @@ impl CPUInstruction for SBC8BIN {
         let (bytes, cycles) = cycles::increment_cycles_arithmetic(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for SBC8BIN {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -46,9 +76,7 @@ impl CPUInstruction for SBC16BIN {
         let (bytes, cycles) = cycles::increment_cycles_arithmetic(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for SBC16BIN {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -70,9 +98,7 @@ impl CPUInstruction for SBC8BCD {
         let (bytes, cycles) = cycles::increment_cycles_arithmetic(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for SBC8BCD {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -94,9 +120,7 @@ impl CPUInstruction for SBC16BCD {
         let (bytes, cycles) = cycles::increment_cycles_arithmetic(&registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for SBC16BCD {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/sec.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "SEC";
@@ -14,9 +14,7 @@ impl CPUInstruction for SEC {
         let (bytes, cycles) = cycles::increment_cycles_set_flag();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for SEC {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/sed.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "SED";
@@ -14,9 +14,7 @@ impl CPUInstruction for SED {
         let (bytes, cycles) = cycles::increment_cycles_set_flag();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for SED {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/sei.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "SEI";
@@ -14,9 +14,7 @@ impl CPUInstruction for SEI {
         let (bytes, cycles) = cycles::increment_cycles_set_flag();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for SEI {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/sep.rs

@@ -2,7 +2,8 @@ use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
 use crate::utils::addressing::AddressingMode;
-use super::{CPUInstruction, Decode, read_8bit_from_address};
+use super::read_write_common::read_8bit_from_address;
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "SEP";
@@ -16,9 +17,7 @@ impl CPUInstruction for SEP {
         let (bytes, cycles) = cycles::increment_cycles_sep();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for SEP {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_8bit_immediate(opcode, INSTR_NAME, registers, bus)
     }

snes-core/src/cpu/instructionstemp/sta.rs

@@ -2,11 +2,37 @@ use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 use crate::utils::addressing::AddressingMode;
 
-use super::{CPUInstruction, Decode, write_8bit_to_address, write_16bit_to_address};
+use super::read_write_common::{write_8bit_to_address, write_16bit_to_address};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "STA";
 
+pub struct STA {
+    pub addressing_mode: AddressingMode,
+}
+
+impl STA {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_mode() {
+            true => Box::new(STA16{addressing_mode: self.addressing_mode}),
+            false => Box::new(STA8{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for STA {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct STA8 {
     addressing_mode: AddressingMode,
 }
@@ -17,9 +43,7 @@ impl CPUInstruction for STA8 {
         let (bytes, cycles) = cycles::increment_cycles_sta(registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for STA8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -35,9 +59,7 @@ impl CPUInstruction for STA16 {
         let (bytes, cycles) = cycles::increment_cycles_sta(registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for STA16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/stp.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "STP";
@@ -14,9 +14,7 @@ impl CPUInstruction for STP {
         let (bytes, cycles) = cycles::increment_cycles_stp();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for STP {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/stx.rs

@@ -2,11 +2,37 @@ use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 use crate::utils::addressing::AddressingMode;
 
-use super::{CPUInstruction, Decode, write_8bit_to_address, write_16bit_to_address};
+use super::read_write_common::{write_8bit_to_address, write_16bit_to_address};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "STX";
 
+pub struct STX {
+    pub addressing_mode: AddressingMode,
+}
+
+impl STX {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_index() {
+            true => Box::new(STX16{addressing_mode: self.addressing_mode}),
+            false => Box::new(STX8{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for STX {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct STX8 {
     addressing_mode: AddressingMode,
 }
@@ -17,9 +43,7 @@ impl CPUInstruction for STX8 {
         let (bytes, cycles) = cycles::increment_cycles_st_index(registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for STX8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -35,9 +59,7 @@ impl CPUInstruction for STX16 {
         let (bytes, cycles) = cycles::increment_cycles_st_index(registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for STX16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/sty.rs

@@ -2,11 +2,37 @@ use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 use crate::utils::addressing::AddressingMode;
 
-use super::{CPUInstruction, Decode, write_8bit_to_address, write_16bit_to_address};
+use super::read_write_common::{write_8bit_to_address, write_16bit_to_address};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "STY";
 
+pub struct STY {
+    pub addressing_mode: AddressingMode,
+}
+
+impl STY {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_index() {
+            true => Box::new(STY16{addressing_mode: self.addressing_mode}),
+            false => Box::new(STY8{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for STY {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct STY8 {
     addressing_mode: AddressingMode,
 }
@@ -17,9 +43,7 @@ impl CPUInstruction for STY8 {
         let (bytes, cycles) = cycles::increment_cycles_st_index(registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for STY8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -35,9 +59,7 @@ impl CPUInstruction for STY16 {
         let (bytes, cycles) = cycles::increment_cycles_st_index(registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for STY16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/stz.rs

@@ -2,11 +2,37 @@ use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 use crate::utils::addressing::AddressingMode;
 
-use super::{CPUInstruction, Decode, write_8bit_to_address, write_16bit_to_address};
+use super::read_write_common::{write_8bit_to_address, write_16bit_to_address};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "STZ";
 
+pub struct STZ {
+    pub addressing_mode: AddressingMode,
+}
+
+impl STZ {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_mode() {
+            true => Box::new(STZ16{addressing_mode: self.addressing_mode}),
+            false => Box::new(STZ8{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for STZ {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct STZ8 {
     addressing_mode: AddressingMode,
 }
@@ -17,9 +43,7 @@ impl CPUInstruction for STZ8 {
         let (bytes, cycles) = cycles::increment_cycles_st_index(registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for STZ8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -35,9 +59,7 @@ impl CPUInstruction for STZ16 {
         let (bytes, cycles) = cycles::increment_cycles_st_index(registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for STZ16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/tax.rs

@@ -1,11 +1,33 @@
 use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "TAX";
 
+pub struct TAX {}
+
+impl TAX {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_index() {
+            true => Box::new(TAX16{}),
+            false => Box::new(TAX8{}),
+        }
+    }
+}
+
+impl CPUInstruction for TAX {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
 pub struct TAX8 {}
 
 impl CPUInstruction for TAX8 {
@@ -17,9 +39,7 @@ impl CPUInstruction for TAX8 {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TAX8 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }
@@ -35,9 +55,7 @@ impl CPUInstruction for TAX16 {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TAX16 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/tay.rs

@@ -1,11 +1,34 @@
 use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "TAY";
 
+pub struct TAY {}
+
+impl TAY {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_index() {
+            true => Box::new(TAY16{}),
+            false => Box::new(TAY8{}),
+        }
+    }
+}
+
+impl CPUInstruction for TAY {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct TAY8 {}
 
 impl CPUInstruction for TAY8 {
@@ -17,9 +40,7 @@ impl CPUInstruction for TAY8 {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TAY8 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }
@@ -35,9 +56,7 @@ impl CPUInstruction for TAY16 {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TAY16 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/tcd.rs

@@ -1,7 +1,7 @@
 use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "TCD";
@@ -17,9 +17,7 @@ impl CPUInstruction for TCD {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TCD {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/tcs.rs

@@ -1,7 +1,7 @@
 use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "TCS";
@@ -17,9 +17,7 @@ impl CPUInstruction for TCS {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TCS {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/tdc.rs

@@ -1,7 +1,7 @@
 use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "TDC";
@@ -17,9 +17,7 @@ impl CPUInstruction for TDC {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TDC {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/trb.rs

@@ -2,11 +2,37 @@ use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 use crate::utils::addressing::AddressingMode;
 
-use super::{CPUInstruction, Decode, read_8bit_from_address, write_8bit_to_address, read_16bit_from_address, write_16bit_to_address};
+use super::read_write_common::{read_8bit_from_address, write_8bit_to_address, read_16bit_from_address, write_16bit_to_address};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "TRB";
 
+pub struct TRB {
+    pub addressing_mode: AddressingMode,
+}
+
+impl TRB {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_mode() {
+            true => Box::new(TRB16{addressing_mode: self.addressing_mode}),
+            false => Box::new(TRB8{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for TRB {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct TRB8 {
     addressing_mode: AddressingMode,
 }
@@ -20,9 +46,7 @@ impl CPUInstruction for TRB8 {
         let (bytes, cycles) = cycles::increment_cycles_test(registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TRB8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -41,9 +65,7 @@ impl CPUInstruction for TRB16 {
         let (bytes, cycles) = cycles::increment_cycles_test(registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TRB16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/tsb.rs

@@ -2,11 +2,37 @@ use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 use crate::utils::addressing::AddressingMode;
 
-use super::{CPUInstruction, Decode, read_8bit_from_address, write_8bit_to_address, read_16bit_from_address, write_16bit_to_address};
+use super::read_write_common::{read_8bit_from_address, write_8bit_to_address, read_16bit_from_address, write_16bit_to_address};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "TSB";
 
+pub struct TSB {
+    pub addressing_mode: AddressingMode,
+}
+
+impl TSB {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_mode() {
+            true => Box::new(TSB16{addressing_mode: self.addressing_mode}),
+            false => Box::new(TSB8{addressing_mode: self.addressing_mode}),
+        }
+    }
+}
+
+impl CPUInstruction for TSB {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct TSB8 {
     addressing_mode: AddressingMode,
 }
@@ -20,9 +46,7 @@ impl CPUInstruction for TSB8 {
         let (bytes, cycles) = cycles::increment_cycles_test(registers, self.addressing_mode);
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TSB8 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }
@@ -39,9 +63,7 @@ impl CPUInstruction for TSB16 {
         write_16bit_to_address(registers, bus, self.addressing_mode, result);
         registers.set_zero_flag(result == 0);
     }
-}
 
-impl Decode for TSB16 {
     fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
     }

snes-core/src/cpu/instructionstemp/tsc.rs

@@ -1,7 +1,7 @@
 use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "TSC";
@@ -17,9 +17,7 @@ impl CPUInstruction for TSC {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TSC {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/tsx.rs

@@ -1,11 +1,34 @@
 use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "TSX";
 
+pub struct TSX {}
+
+impl TSX {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_index() {
+            true => Box::new(TSX16{}),
+            false => Box::new(TSX8{}),
+        }
+    }
+}
+
+impl CPUInstruction for TSX {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct TSX8 {}
 
 impl CPUInstruction for TSX8 {
@@ -17,9 +40,7 @@ impl CPUInstruction for TSX8 {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TSX8 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }
@@ -36,9 +57,7 @@ impl CPUInstruction for TSX16 {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TSX16 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/txa.rs

@@ -1,11 +1,34 @@
 use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "TXA";
 
+pub struct TXA {}
+
+impl TXA {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_mode() {
+            true => Box::new(TXA16{}),
+            false => Box::new(TXA8{}),
+        }
+    }
+}
+
+impl CPUInstruction for TXA {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct TXA8 {}
 
 impl CPUInstruction for TXA8 {
@@ -17,9 +40,7 @@ impl CPUInstruction for TXA8 {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TXA8 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }
@@ -36,9 +57,7 @@ impl CPUInstruction for TXA16 {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TXA16 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/txs.rs

@@ -1,11 +1,34 @@
 use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "TXS";
 
+pub struct TXS {}
+
+impl TXS {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_index() {
+            true => Box::new(TXS16{}),
+            false => Box::new(TXS8{}),
+        }
+    }
+}
+
+impl CPUInstruction for TXS {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct TXS8 {}
 
 impl CPUInstruction for TXS8 {
@@ -17,9 +40,7 @@ impl CPUInstruction for TXS8 {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TXS8 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }
@@ -36,9 +57,7 @@ impl CPUInstruction for TXS16 {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TXS16 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/txy.rs

@@ -1,11 +1,34 @@
 use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "TXY";
 
+pub struct TXY {}
+
+impl TXY {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_index() {
+            true => Box::new(TXY16{}),
+            false => Box::new(TXY8{}),
+        }
+    }
+}
+
+impl CPUInstruction for TXY {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct TXY8 {}
 
 impl CPUInstruction for TXY8 {
@@ -17,9 +40,7 @@ impl CPUInstruction for TXY8 {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TXY8 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }
@@ -36,9 +57,7 @@ impl CPUInstruction for TXY16 {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TXY16 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/tya.rs

@@ -1,11 +1,34 @@
 use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "TYA";
 
+pub struct TYA {}
+
+impl TYA {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_mode() {
+            true => Box::new(TYA16{}),
+            false => Box::new(TYA8{}),
+        }
+    }
+}
+
+impl CPUInstruction for TYA {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct TYA8 {}
 
 impl CPUInstruction for TYA8 {
@@ -17,9 +40,7 @@ impl CPUInstruction for TYA8 {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TYA8 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }
@@ -35,9 +56,7 @@ impl CPUInstruction for TYA16 {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TYA16 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/tyx.rs

@@ -1,11 +1,34 @@
 use crate::cpu::cycles;
 use crate::cpu::{bus::Bus, registers::Registers};
 
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "TYX";
 
+pub struct TYX {}
+
+impl TYX {
+    fn determine_instruction(&self, registers: &Registers) -> Box<dyn CPUInstruction> {
+        match registers.is_16bit_index() {
+            true => Box::new(TYX16{}),
+            false => Box::new(TYX8{}),
+        }
+    }
+}
+
+impl CPUInstruction for TYX {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let instruction = self.determine_instruction(registers);
+        instruction.execute(registers, bus);
+    }
+
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        let instruction = self.determine_instruction(registers);
+        instruction.mnemonic(registers, bus, opcode)
+    }
+}
+
 pub struct TYX8 {}
 
 impl CPUInstruction for TYX8 {
@@ -17,9 +40,7 @@ impl CPUInstruction for TYX8 {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TYX8 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }
@@ -36,9 +57,7 @@ impl CPUInstruction for TYX16 {
         let (bytes, cycles) = cycles::increment_cycles_transfer();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for TYX16 {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/wai.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "WAI";
@@ -14,9 +14,7 @@ impl CPUInstruction for WAI {
         let (bytes, cycles) = cycles::increment_cycles_stp();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for WAI {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/wdm.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "WDM";
@@ -13,9 +13,7 @@ impl CPUInstruction for WDM {
         let (bytes, cycles) = cycles::increment_cycles_wdm();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for WDM {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/xba.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "XBA";
@@ -16,9 +16,7 @@ impl CPUInstruction for XBA {
         let (bytes, cycles) = cycles::increment_cycles_xba();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for XBA {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }

snes-core/src/cpu/instructionstemp/xce.rs

@@ -1,7 +1,7 @@
 use crate::cpu::{bus::Bus, registers::Registers};
 
 use crate::cpu::cycles;
-use super::{CPUInstruction, Decode};
+use super::CPUInstruction;
 use super::decoder_common;
 
 static INSTR_NAME: &'static str = "XCE";
@@ -14,9 +14,7 @@ impl CPUInstruction for XCE {
         let (bytes, cycles) = cycles::increment_cycles_exchange();
         registers.increment_pc(bytes); registers.cycles += cycles;
     }
-}
 
-impl Decode for XCE {
     fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
         decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
     }