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https://github.com/FranLMSP/snes.git
synced 2026-08-03 08:30:01 -04:00
mvn and mvp
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@@ -120,3 +120,9 @@ pub fn mnemonic_branch_nearlabel(opcode: u8, instr_name: &str, registers: &Regis
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pub fn mnemonic_single_byte_instr(opcode: u8, instr_name: &str) -> String {
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pub fn mnemonic_single_byte_instr(opcode: u8, instr_name: &str) -> String {
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format!("{:02X} __ __ __ | {}", opcode, instr_name)
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format!("{:02X} __ __ __ | {}", opcode, instr_name)
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}
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}
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pub fn mnemonic_move(opcode: u8, instr_name: &str, registers: &Registers, bus: &Bus) -> String {
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let next_byte = bus.read_external(registers.get_pc_address() + 1);
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let next_second_byte = bus.read_external(registers.get_pc_address() + 2);
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format!("{:02X} {:02X} {:02X} __ | {} {:02X},{:02X}", opcode, next_byte, next_second_byte, instr_name, next_second_byte, next_byte)
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}
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@@ -38,12 +38,15 @@ pub mod lda;
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pub mod ldx;
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pub mod ldx;
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pub mod ldy;
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pub mod ldy;
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pub mod lsr;
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pub mod lsr;
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pub mod mvn;
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pub mod mvp;
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pub mod bit_common;
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pub mod bit_common;
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pub mod dec_common;
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pub mod dec_common;
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pub mod decoder_common;
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pub mod decoder_common;
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pub mod branch_common;
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pub mod branch_common;
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pub mod push_common;
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pub mod push_common;
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pub mod comp_common;
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pub mod comp_common;
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pub mod move_common;
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pub trait CPUInstruction {
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pub trait CPUInstruction {
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fn execute(&self, registers: &mut Registers, bus: &mut Bus);
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fn execute(&self, registers: &mut Registers, bus: &mut Bus);
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@@ -0,0 +1,29 @@
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use crate::cpu::{registers::Registers, bus::Bus, cycles};
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pub fn do_move(registers: &mut Registers, bus: &mut Bus, is_next: bool) {
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let pc = registers.get_pc_address();
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let source_bank = bus.read(pc + 2);
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let dest_bank = bus.read(pc + 1);
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let mut count = 0;
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while registers.a != 0xFFFF {
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let (x, y) = match registers.is_16bit_index() {
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true => (registers.x, registers.y),
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false => (registers.x & 0x00FF, registers.y & 0x00FF),
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};
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let source_address = ((source_bank as u32) << 16) | (x as u32);
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let dest_address = ((dest_bank as u32) << 16) | (y as u32);
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let byte = bus.read(source_address);
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bus.write(dest_address, byte);
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registers.a = registers.a.wrapping_sub(1);
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if is_next {
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registers.x = registers.x.wrapping_add(1);
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registers.y = registers.y.wrapping_add(1);
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} else {
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registers.x = registers.x.wrapping_sub(1);
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registers.y = registers.y.wrapping_sub(1);
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}
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count += 1;
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}
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let (bytes, cycles) = cycles::increment_cycles_move(count);
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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@@ -0,0 +1,30 @@
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use crate::cpu::{bus::Bus, registers::Registers};
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use super::{CPUInstruction, Decode, move_common};
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use super::decoder_common;
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static INSTR_NAME: &'static str = "MVN";
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pub struct MVN {}
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impl CPUInstruction for MVN {
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fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
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move_common::do_move(registers, bus, true);
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}
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}
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impl Decode for MVN {
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fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
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decoder_common::mnemonic_move(opcode, INSTR_NAME, registers, bus)
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}
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}
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#[cfg(test)]
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mod cpu_instructions_tests {
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use super::*;
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#[test]
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fn test() {
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}
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}
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@@ -0,0 +1,30 @@
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use crate::cpu::{bus::Bus, registers::Registers};
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use super::{CPUInstruction, Decode, move_common};
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use super::decoder_common;
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static INSTR_NAME: &'static str = "MVP";
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pub struct MVP {}
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impl CPUInstruction for MVP {
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fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
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move_common::do_move(registers, bus, false);
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}
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}
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impl Decode for MVP {
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fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
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decoder_common::mnemonic_move(opcode, INSTR_NAME, registers, bus)
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}
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}
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#[cfg(test)]
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mod cpu_instructions_tests {
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use super::*;
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#[test]
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fn test() {
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}
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}
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