From a68ca8d5744efa6f45aae3d3ea30240a4e905444 Mon Sep 17 00:00:00 2001 From: Franco Colmenarez Date: Sat, 30 Dec 2023 09:57:02 -0500 Subject: [PATCH] st instructions --- snes-core/src/cpu/instructionstemp/mod.rs | 3 + snes-core/src/cpu/instructionstemp/sta.rs | 83 +++++++++++++++++++++++ snes-core/src/cpu/instructionstemp/stx.rs | 83 +++++++++++++++++++++++ snes-core/src/cpu/instructionstemp/sty.rs | 83 +++++++++++++++++++++++ 4 files changed, 252 insertions(+) create mode 100644 snes-core/src/cpu/instructionstemp/sta.rs create mode 100644 snes-core/src/cpu/instructionstemp/stx.rs create mode 100644 snes-core/src/cpu/instructionstemp/sty.rs diff --git a/snes-core/src/cpu/instructionstemp/mod.rs b/snes-core/src/cpu/instructionstemp/mod.rs index 3ffed58..956b160 100644 --- a/snes-core/src/cpu/instructionstemp/mod.rs +++ b/snes-core/src/cpu/instructionstemp/mod.rs @@ -69,6 +69,9 @@ pub mod sec; pub mod sed; pub mod sei; pub mod sep; +pub mod sta; +pub mod stx; +pub mod sty; pub mod bit_common; pub mod dec_common; pub mod decoder_common; diff --git a/snes-core/src/cpu/instructionstemp/sta.rs b/snes-core/src/cpu/instructionstemp/sta.rs new file mode 100644 index 0000000..86b6a1e --- /dev/null +++ b/snes-core/src/cpu/instructionstemp/sta.rs @@ -0,0 +1,83 @@ +use crate::cpu::cycles; +use crate::cpu::{bus::Bus, registers::Registers}; +use crate::utils::addressing::AddressingMode; + +use super::{CPUInstruction, Decode, write_8bit_to_address, write_16bit_to_address}; +use super::decoder_common; + +static INSTR_NAME: &'static str = "STA"; + +pub struct STA8 { + addressing_mode: AddressingMode, +} + +impl CPUInstruction for STA8 { + fn execute(&self, registers: &mut Registers, bus: &mut Bus) { + write_8bit_to_address(registers, bus, self.addressing_mode, registers.a as u8); + let (bytes, cycles) = cycles::increment_cycles_sta(registers, self.addressing_mode); + registers.increment_pc(bytes); registers.cycles += cycles; + } +} + +impl Decode for STA8 { + fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String { + decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus) + } +} + +pub struct STA16 { + addressing_mode: AddressingMode, +} + +impl CPUInstruction for STA16 { + fn execute(&self, registers: &mut Registers, bus: &mut Bus) { + write_16bit_to_address(registers, bus, self.addressing_mode, registers.a); + let (bytes, cycles) = cycles::increment_cycles_sta(registers, self.addressing_mode); + registers.increment_pc(bytes); registers.cycles += cycles; + } +} + +impl Decode for STA16 { + fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String { + decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus) + } +} + + +#[cfg(test)] +mod cpu_instructions_tests { + use super::*; + + #[test] + fn test_8bit() { + let mut registers = Registers::new(); + let mut bus = Bus::new(); + registers.pc = 0x0000; + registers.a = 0x12; + registers.set_16bit_mode(false); + bus.write(0x0002, 0x00); + bus.write(0x0001, 0x03); + let instruction = STA8{addressing_mode: AddressingMode::Absolute}; + instruction.execute(&mut registers, &mut bus); + assert_eq!(bus.read(0x0003), 0x12); + assert_eq!(registers.pc, 0x0003); + assert_eq!(registers.cycles, 4); + } + + #[test] + fn test_16bit() { + let mut registers = Registers::new(); + let mut bus = Bus::new(); + registers.pc = 0x0000; + registers.a = 0x1234; + registers.set_16bit_mode(true); + bus.write(0x0002, 0x00); + bus.write(0x0001, 0x03); + let instruction = STA16{addressing_mode: AddressingMode::Absolute}; + instruction.execute(&mut registers, &mut bus); + assert_eq!(bus.read(0x0003), 0x34); + assert_eq!(bus.read(0x0004), 0x12); + assert_eq!(registers.pc, 0x0003); + assert_eq!(registers.cycles, 4); + } +} diff --git a/snes-core/src/cpu/instructionstemp/stx.rs b/snes-core/src/cpu/instructionstemp/stx.rs new file mode 100644 index 0000000..46e27c2 --- /dev/null +++ b/snes-core/src/cpu/instructionstemp/stx.rs @@ -0,0 +1,83 @@ +use crate::cpu::cycles; +use crate::cpu::{bus::Bus, registers::Registers}; +use crate::utils::addressing::AddressingMode; + +use super::{CPUInstruction, Decode, write_8bit_to_address, write_16bit_to_address}; +use super::decoder_common; + +static INSTR_NAME: &'static str = "STX"; + +pub struct STX8 { + addressing_mode: AddressingMode, +} + +impl CPUInstruction for STX8 { + fn execute(&self, registers: &mut Registers, bus: &mut Bus) { + write_8bit_to_address(registers, bus, self.addressing_mode, registers.x as u8); + let (bytes, cycles) = cycles::increment_cycles_st_index(registers, self.addressing_mode); + registers.increment_pc(bytes); registers.cycles += cycles; + } +} + +impl Decode for STX8 { + fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String { + decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus) + } +} + +pub struct STX16 { + addressing_mode: AddressingMode, +} + +impl CPUInstruction for STX16 { + fn execute(&self, registers: &mut Registers, bus: &mut Bus) { + write_16bit_to_address(registers, bus, self.addressing_mode, registers.x); + let (bytes, cycles) = cycles::increment_cycles_st_index(registers, self.addressing_mode); + registers.increment_pc(bytes); registers.cycles += cycles; + } +} + +impl Decode for STX16 { + fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String { + decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus) + } +} + + +#[cfg(test)] +mod cpu_instructions_tests { + use super::*; + + #[test] + fn test_8bit() { + let mut registers = Registers::new(); + let mut bus = Bus::new(); + registers.pc = 0x0000; + registers.x = 0x12; + registers.set_16bit_mode(false); + bus.write(0x0002, 0x00); + bus.write(0x0001, 0x03); + let instruction = STX8{addressing_mode: AddressingMode::Absolute}; + instruction.execute(&mut registers, &mut bus); + assert_eq!(bus.read(0x0003), 0x12); + assert_eq!(registers.pc, 0x0003); + assert_eq!(registers.cycles, 4); + } + + #[test] + fn test_16bit() { + let mut registers = Registers::new(); + let mut bus = Bus::new(); + registers.pc = 0x0000; + registers.x = 0x1234; + registers.set_16bit_mode(true); + bus.write(0x0002, 0x00); + bus.write(0x0001, 0x03); + let instruction = STX16{addressing_mode: AddressingMode::Absolute}; + instruction.execute(&mut registers, &mut bus); + assert_eq!(bus.read(0x0003), 0x34); + assert_eq!(bus.read(0x0004), 0x12); + assert_eq!(registers.pc, 0x0003); + assert_eq!(registers.cycles, 4); + } +} diff --git a/snes-core/src/cpu/instructionstemp/sty.rs b/snes-core/src/cpu/instructionstemp/sty.rs new file mode 100644 index 0000000..ebdc8b8 --- /dev/null +++ b/snes-core/src/cpu/instructionstemp/sty.rs @@ -0,0 +1,83 @@ +use crate::cpu::cycles; +use crate::cpu::{bus::Bus, registers::Registers}; +use crate::utils::addressing::AddressingMode; + +use super::{CPUInstruction, Decode, write_8bit_to_address, write_16bit_to_address}; +use super::decoder_common; + +static INSTR_NAME: &'static str = "STY"; + +pub struct STY8 { + addressing_mode: AddressingMode, +} + +impl CPUInstruction for STY8 { + fn execute(&self, registers: &mut Registers, bus: &mut Bus) { + write_8bit_to_address(registers, bus, self.addressing_mode, registers.y as u8); + let (bytes, cycles) = cycles::increment_cycles_st_index(registers, self.addressing_mode); + registers.increment_pc(bytes); registers.cycles += cycles; + } +} + +impl Decode for STY8 { + fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String { + decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus) + } +} + +pub struct STY16 { + addressing_mode: AddressingMode, +} + +impl CPUInstruction for STY16 { + fn execute(&self, registers: &mut Registers, bus: &mut Bus) { + write_16bit_to_address(registers, bus, self.addressing_mode, registers.y); + let (bytes, cycles) = cycles::increment_cycles_st_index(registers, self.addressing_mode); + registers.increment_pc(bytes); registers.cycles += cycles; + } +} + +impl Decode for STY16 { + fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String { + decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus) + } +} + + +#[cfg(test)] +mod cpu_instructions_tests { + use super::*; + + #[test] + fn test_8bit() { + let mut registers = Registers::new(); + let mut bus = Bus::new(); + registers.pc = 0x0000; + registers.y = 0x12; + registers.set_16bit_mode(false); + bus.write(0x0002, 0x00); + bus.write(0x0001, 0x03); + let instruction = STY8{addressing_mode: AddressingMode::Absolute}; + instruction.execute(&mut registers, &mut bus); + assert_eq!(bus.read(0x0003), 0x12); + assert_eq!(registers.pc, 0x0003); + assert_eq!(registers.cycles, 4); + } + + #[test] + fn test_16bit() { + let mut registers = Registers::new(); + let mut bus = Bus::new(); + registers.pc = 0x0000; + registers.y = 0x1234; + registers.set_16bit_mode(true); + bus.write(0x0002, 0x00); + bus.write(0x0001, 0x03); + let instruction = STY16{addressing_mode: AddressingMode::Absolute}; + instruction.execute(&mut registers, &mut bus); + assert_eq!(bus.read(0x0003), 0x34); + assert_eq!(bus.read(0x0004), 0x12); + assert_eq!(registers.pc, 0x0003); + assert_eq!(registers.cycles, 4); + } +}