WIP PPU structure

This commit is contained in:
2022-12-12 22:04:03 -05:00
parent 0d1e8f8078
commit a3f12e61b4
6 changed files with 26 additions and 5 deletions
+6
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@@ -1,5 +1,8 @@
use crate::ppu::PPU;
pub struct Bus {
wram: [u8; 0x10000],
pub ppu: PPU,
}
#[derive(PartialEq, Debug)]
@@ -15,6 +18,7 @@ impl Bus {
pub fn new() -> Self {
Self {
wram: [0; 0x10000],
ppu: PPU::new(),
}
}
@@ -49,6 +53,7 @@ impl Bus {
let section = Bus::map_address(address);
match section {
MemoryMap::WRAM => self.read_wram(address),
MemoryMap::PPU => self.ppu.registers.read(address as u16),
_ => todo!("Implement other memory sections"),
}
}
@@ -57,6 +62,7 @@ impl Bus {
let section = Bus::map_address(address);
match section {
MemoryMap::WRAM => self.write_wram(address, value),
MemoryMap::PPU => self.ppu.registers.write(address as u16, value),
_ => todo!("Implement other memory sections"),
}
}
+3
View File
@@ -20,5 +20,8 @@ impl Emulator {
pub fn run(&mut self) {
self.cpu.run(&mut self.bus);
self.bus.ppu.tick(self.cpu.cycles);
self.cpu.cycles = 0;
}
}
+1
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@@ -1,4 +1,5 @@
pub mod cpu;
pub mod ppu;
pub mod rom;
pub mod utils;
pub mod common;
View File
+4 -4
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@@ -2,19 +2,19 @@ use super::registers::PPURegisters;
pub struct PPU {
framebuffer: Vec<u8>,
registers: PPURegisters,
pub registers: PPURegisters,
}
impl PPU {
pub fn new() -> Self {
Self {
framebuffer: vec![],
registers: PPURegisters,
registers: PPURegisters::new(),
}
}
pub fn tick(&mut self, cycles: usize) {
for _ in 0..cycles {
pub fn tick(&mut self, cpu_cycles: usize) {
for _ in 0..cpu_cycles {
self.do_cycle();
}
}
+12 -1
View File
@@ -61,10 +61,21 @@ pub const TMW: u16 = 0x212E; // Window Area Main Screen Disable (W)
pub const TSW: u16 = 0x212F; // Window Area Sub Screen Disable (W)
pub struct PPURegisters {
data: [u8; 256],
}
impl PPURegisters {
pub fn new() -> Self {
Self {
data: [0x00; 256],
}
}
pub fn read(&self, address: u16) -> u8 {
self.data[(address as usize) - 0x2100]
}
pub fn write(&mut self, address: u16, value: u8) {
self.data[(address as usize) - 0x2100] = value;
}
}