diff --git a/snes-core/src/cpu/instructions/ldx.rs b/snes-core/src/cpu/instructions/ldx.rs index d051c58..886d6a7 100644 --- a/snes-core/src/cpu/instructions/ldx.rs +++ b/snes-core/src/cpu/instructions/ldx.rs @@ -16,8 +16,8 @@ pub struct LDX { impl LDX { fn determine_instruction(&self, registers: &Registers) -> Box { match registers.is_16bit_index() { - true => Box::new(LDX{addressing_mode: self.addressing_mode}), - false => Box::new(LDX{addressing_mode: self.addressing_mode}), + true => Box::new(LDX16{addressing_mode: self.addressing_mode}), + false => Box::new(LDX8{addressing_mode: self.addressing_mode}), } } } diff --git a/snes-core/src/cpu/instructions/ldy.rs b/snes-core/src/cpu/instructions/ldy.rs index cb2444a..5c664fd 100644 --- a/snes-core/src/cpu/instructions/ldy.rs +++ b/snes-core/src/cpu/instructions/ldy.rs @@ -16,8 +16,8 @@ pub struct LDY { impl LDY { fn determine_instruction(&self, registers: &Registers) -> Box { match registers.is_16bit_index() { - true => Box::new(LDY{addressing_mode: self.addressing_mode}), - false => Box::new(LDY{addressing_mode: self.addressing_mode}), + true => Box::new(LDY16{addressing_mode: self.addressing_mode}), + false => Box::new(LDY8{addressing_mode: self.addressing_mode}), } } } diff --git a/snes-core/src/cpu/instructions/lsr.rs b/snes-core/src/cpu/instructions/lsr.rs index f4ce861..b512c70 100644 --- a/snes-core/src/cpu/instructions/lsr.rs +++ b/snes-core/src/cpu/instructions/lsr.rs @@ -13,8 +13,8 @@ pub struct LSR { impl LSR { fn determine_instruction(&self, registers: &Registers) -> Box { match registers.is_16bit_mode() { - true => Box::new(LSR{addressing_mode: self.addressing_mode}), - false => Box::new(LSR{addressing_mode: self.addressing_mode}), + true => Box::new(LSR16{addressing_mode: self.addressing_mode}), + false => Box::new(LSR8{addressing_mode: self.addressing_mode}), } } }