inc

snes-core/src/cpu/instructionstemp/dec_common.rs

@@ -10,3 +10,14 @@ pub fn do_dec<T: SnesNum>(registers: &mut Registers, target: T) -> T {
     }
     result
 }
+
+pub fn do_inc<T: SnesNum>(registers: &mut Registers, target: T) -> T {
+    let (result, affected_flags) = alu::adc_bin(target, T::from_u32(1), false);
+    for flag in affected_flags {
+        match flag {
+            Flags::Negative(_) | Flags::Zero(_) => registers.set_flags(&[flag]),
+            _ => {},
+        }
+    }
+    result
+}

snes-core/src/cpu/instructionstemp/inc.rs

@@ -0,0 +1,91 @@
+use crate::{cpu::{bus::Bus, registers::Registers}, utils::addressing::AddressingMode};
+
+use crate::cpu::cycles;
+use super::{CPUInstruction, Decode, write_8bit_to_address, write_16bit_to_address, read_8bit_from_address, read_16bit_from_address, dec_common};
+use super::decoder_common;
+
+static INSTR_NAME: &'static str = "INC";
+
+pub struct INC8 {
+    addressing_mode: AddressingMode,
+}
+
+impl CPUInstruction for INC8 {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let result = dec_common::do_inc(
+            registers,
+            read_8bit_from_address(registers, bus, self.addressing_mode),
+        ) as u8;
+        write_8bit_to_address(registers, bus, self.addressing_mode, result);
+        let (bytes, cycles) = cycles::increment_cycles_inc_dec(&registers, self.addressing_mode);
+        registers.increment_pc(bytes); registers.cycles += cycles;
+    }
+}
+
+impl Decode for INC8 {
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
+    }
+}
+
+pub struct INC16 {
+    addressing_mode: AddressingMode,
+}
+
+impl CPUInstruction for INC16 {
+    fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
+        let result = dec_common::do_inc(
+            registers,
+            read_16bit_from_address(registers, bus, self.addressing_mode),
+        ) as u16;
+        write_16bit_to_address(registers, bus, self.addressing_mode, result);
+        let (bytes, cycles) = cycles::increment_cycles_inc_dec(&registers, self.addressing_mode);
+        registers.increment_pc(bytes); registers.cycles += cycles;
+    }
+}
+
+impl Decode for INC16 {
+    fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
+        decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
+    }
+}
+
+
+#[cfg(test)]
+mod cpu_instructions_tests {
+    use super::*;
+
+    #[test]
+    fn test_8bit() {
+        let mut registers = Registers::new();
+        let mut bus = Bus::new();
+        registers.a   = 0x0001;
+        registers.pbr = 0x00;
+        registers.pc  = 0x0000;
+        registers.set_memory_select_flag(true);
+        let instruction = INC8{addressing_mode: AddressingMode::Accumulator};
+        instruction.execute(&mut registers, &mut bus);
+        assert_eq!(registers.a, 2);
+        assert_eq!(registers.pc, 0x01);
+        assert_eq!(registers.cycles, 2);
+        assert!(!registers.get_negative_flag());
+        assert!(!registers.get_zero_flag());
+    }
+
+    #[test]
+    fn test_16bit() {
+        let mut registers = Registers::new();
+        let mut bus = Bus::new();
+        registers.a   = 0x0001;
+        registers.pbr = 0x00;
+        registers.pc  = 0x0000;
+        registers.set_memory_select_flag(false);
+        let instruction = INC16{addressing_mode: AddressingMode::Accumulator};
+        instruction.execute(&mut registers, &mut bus);
+        assert_eq!(registers.a, 2);
+        assert_eq!(registers.pc, 0x01);
+        assert_eq!(registers.cycles, 2);
+        assert!(!registers.get_negative_flag());
+        assert!(!registers.get_zero_flag());
+    }
+}

snes-core/src/cpu/instructionstemp/inx.rs

@@ -0,0 +1,85 @@
+use crate::cpu::{bus::Bus, registers::Registers};
+
+use crate::cpu::cycles;
+use super::{CPUInstruction, Decode, dec_common};
+use super::decoder_common;
+
+static INSTR_NAME: &'static str = "INX";
+
+pub struct INX8 {}
+
+impl CPUInstruction for INX8 {
+    fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
+        let result = dec_common::do_inc(
+            registers,
+            registers.x,
+        ) as u8;
+        registers.set_low_x(result);
+        let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
+        registers.increment_pc(bytes); registers.cycles += cycles;
+    }
+}
+
+impl Decode for INX8 {
+    fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
+        decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
+    }
+}
+
+pub struct INX16 {}
+
+impl CPUInstruction for INX16 {
+    fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
+        let result = dec_common::do_inc(
+            registers,
+            registers.x,
+        ) as u16;
+        registers.x = result;
+        let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
+        registers.increment_pc(bytes); registers.cycles += cycles;
+    }
+}
+
+impl Decode for INX16 {
+    fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
+        decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
+    }
+}
+
+
+#[cfg(test)]
+mod cpu_instructions_tests {
+    use super::*;
+
+    #[test]
+    fn test_8bit() {
+        let mut registers = Registers::new();
+        let mut bus = Bus::new();
+        registers.x   = 0x0001;
+        registers.pbr = 0x00;
+        registers.pc  = 0x0000;
+        let instruction = INX8{};
+        instruction.execute(&mut registers, &mut bus);
+        assert_eq!(registers.x, 2);
+        assert_eq!(registers.pc, 0x01);
+        assert_eq!(registers.cycles, 2);
+        assert!(!registers.get_negative_flag());
+        assert!(!registers.get_zero_flag());
+    }
+
+    #[test]
+    fn test_16bit() {
+        let mut registers = Registers::new();
+        let mut bus = Bus::new();
+        registers.x   = 0x0001;
+        registers.pbr = 0x00;
+        registers.pc  = 0x0000;
+        let instruction = INX16{};
+        instruction.execute(&mut registers, &mut bus);
+        assert_eq!(registers.x, 2);
+        assert_eq!(registers.pc, 0x01);
+        assert_eq!(registers.cycles, 2);
+        assert!(!registers.get_negative_flag());
+        assert!(!registers.get_zero_flag());
+    }
+}

snes-core/src/cpu/instructionstemp/iny.rs

@@ -0,0 +1,85 @@
+use crate::cpu::{bus::Bus, registers::Registers};
+
+use crate::cpu::cycles;
+use super::{CPUInstruction, Decode, dec_common};
+use super::decoder_common;
+
+static INSTR_NAME: &'static str = "INY";
+
+pub struct INY8 {}
+
+impl CPUInstruction for INY8 {
+    fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
+        let result = dec_common::do_inc(
+            registers,
+            registers.y,
+        ) as u8;
+        registers.set_low_y(result);
+        let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
+        registers.increment_pc(bytes); registers.cycles += cycles;
+    }
+}
+
+impl Decode for INY8 {
+    fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
+        decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
+    }
+}
+
+pub struct INY16 {}
+
+impl CPUInstruction for INY16 {
+    fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
+        let result = dec_common::do_inc(
+            registers,
+            registers.y,
+        ) as u16;
+        registers.y = result;
+        let (bytes, cycles) = cycles::increment_cycles_inc_dec_index();
+        registers.increment_pc(bytes); registers.cycles += cycles;
+    }
+}
+
+impl Decode for INY16 {
+    fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
+        decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
+    }
+}
+
+
+#[cfg(test)]
+mod cpu_instructions_tests {
+    use super::*;
+
+    #[test]
+    fn test_8bit() {
+        let mut registers = Registers::new();
+        let mut bus = Bus::new();
+        registers.y   = 0x0001;
+        registers.pbr = 0x00;
+        registers.pc  = 0x0000;
+        let instruction = INY8{};
+        instruction.execute(&mut registers, &mut bus);
+        assert_eq!(registers.y, 2);
+        assert_eq!(registers.pc, 0x01);
+        assert_eq!(registers.cycles, 2);
+        assert!(!registers.get_negative_flag());
+        assert!(!registers.get_zero_flag());
+    }
+
+    #[test]
+    fn test_16bit() {
+        let mut registers = Registers::new();
+        let mut bus = Bus::new();
+        registers.y   = 0x0001;
+        registers.pbr = 0x00;
+        registers.pc  = 0x0000;
+        let instruction = INY16{};
+        instruction.execute(&mut registers, &mut bus);
+        assert_eq!(registers.y, 2);
+        assert_eq!(registers.pc, 0x01);
+        assert_eq!(registers.cycles, 2);
+        assert!(!registers.get_negative_flag());
+        assert!(!registers.get_zero_flag());
+    }
+}

snes-core/src/cpu/instructionstemp/mod.rs

@@ -29,6 +29,9 @@ pub mod dec;
 pub mod dex;
 pub mod dey;
 pub mod eor;
+pub mod inc;
+pub mod inx;
+pub mod iny;
 pub mod bit_common;
 pub mod dec_common;
 pub mod decoder_common;