mirror of
https://github.com/FranLMSP/snes.git
synced 2026-08-03 08:30:01 -04:00
last instructions
This commit is contained in:
@@ -88,6 +88,10 @@ pub mod txs;
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pub mod txy;
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pub mod txy;
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pub mod tya;
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pub mod tya;
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pub mod tyx;
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pub mod tyx;
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pub mod wai;
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pub mod wdm;
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pub mod xba;
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pub mod xce;
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pub mod bit_common;
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pub mod bit_common;
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pub mod dec_common;
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pub mod dec_common;
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pub mod decoder_common;
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pub mod decoder_common;
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@@ -0,0 +1,42 @@
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use crate::cpu::{bus::Bus, registers::Registers};
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use crate::cpu::cycles;
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use super::{CPUInstruction, Decode};
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use super::decoder_common;
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static INSTR_NAME: &'static str = "WAI";
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pub struct WAI {}
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impl CPUInstruction for WAI {
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fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
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registers.is_cpu_waiting_interrupt = true;
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let (bytes, cycles) = cycles::increment_cycles_stp();
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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impl Decode for WAI {
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fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
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decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
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}
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}
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#[cfg(test)]
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mod cpu_instructions_tests {
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use super::*;
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#[test]
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fn test() {
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let mut registers = Registers::new();
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let mut bus = Bus::new();
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registers.is_cpu_waiting_interrupt = false;
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registers.pc = 0x0000;
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let instruction = WAI{};
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.pc, 0x0001);
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assert_eq!(registers.is_cpu_waiting_interrupt, true);
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assert_eq!(registers.cycles, 3);
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}
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}
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@@ -0,0 +1,39 @@
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use crate::cpu::{bus::Bus, registers::Registers};
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use crate::cpu::cycles;
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use super::{CPUInstruction, Decode};
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use super::decoder_common;
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static INSTR_NAME: &'static str = "WDM";
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pub struct WDM {}
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impl CPUInstruction for WDM {
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fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
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let (bytes, cycles) = cycles::increment_cycles_wdm();
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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impl Decode for WDM {
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fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
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decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
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}
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}
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#[cfg(test)]
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mod cpu_instructions_tests {
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use super::*;
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#[test]
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fn test() {
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let mut registers = Registers::new();
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let mut bus = Bus::new();
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registers.pc = 0x0000;
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let instruction = WDM{};
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.pc, 0x0002);
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assert_eq!(registers.cycles, 2);
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}
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}
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@@ -0,0 +1,44 @@
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use crate::cpu::{bus::Bus, registers::Registers};
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use crate::cpu::cycles;
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use super::{CPUInstruction, Decode};
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use super::decoder_common;
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static INSTR_NAME: &'static str = "XBA";
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pub struct XBA {}
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impl CPUInstruction for XBA {
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fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
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registers.a = (registers.a << 8) | (registers.a >> 8);
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registers.set_negative_flag(((registers.a as u8) >> 7) == 1);
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registers.set_zero_flag((registers.a as u8) == 0);
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let (bytes, cycles) = cycles::increment_cycles_xba();
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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impl Decode for XBA {
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fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
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decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
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}
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}
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#[cfg(test)]
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mod cpu_instructions_tests {
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use super::*;
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#[test]
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fn test() {
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let mut registers = Registers::new();
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let mut bus = Bus::new();
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registers.pc = 0x0000;
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registers.a = 0x11FF;
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let instruction = XBA{};
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.a, 0xFF11);
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assert_eq!(registers.pc, 0x0001);
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assert_eq!(registers.cycles, 3);
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}
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}
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@@ -0,0 +1,40 @@
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use crate::cpu::{bus::Bus, registers::Registers};
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use crate::cpu::cycles;
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use super::{CPUInstruction, Decode};
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use super::decoder_common;
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static INSTR_NAME: &'static str = "XCE";
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pub struct XCE {}
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impl CPUInstruction for XCE {
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fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
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registers.exchange_carry_and_emulation();
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let (bytes, cycles) = cycles::increment_cycles_exchange();
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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impl Decode for XCE {
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fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
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decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
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}
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}
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#[cfg(test)]
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mod cpu_instructions_tests {
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use super::*;
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#[test]
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fn test() {
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let mut registers = Registers::new();
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let mut bus = Bus::new();
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registers.pc = 0x0000;
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let instruction = XCE{};
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.pc, 0x0001);
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assert_eq!(registers.cycles, 2);
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}
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}
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@@ -12,6 +12,7 @@ pub struct Registers {
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pub pc: u16, // Program counter
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pub pc: u16, // Program counter
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pub emulation_mode: bool,
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pub emulation_mode: bool,
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pub is_cpu_stopped: bool,
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pub is_cpu_stopped: bool,
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pub is_cpu_waiting_interrupt: bool,
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pub cycles: usize,
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pub cycles: usize,
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}
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}
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@@ -29,6 +30,7 @@ impl Registers {
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pc: 0,
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pc: 0,
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emulation_mode: true,
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emulation_mode: true,
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is_cpu_stopped: false,
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is_cpu_stopped: false,
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is_cpu_waiting_interrupt: false,
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cycles: 0,
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cycles: 0,
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}
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}
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}
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}
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