tax and tay

2026-08-03 08:30:01 -04:00 · 2023-12-30 10:20:05 -05:00
parent 877b08fa26
commit 124f145a44
3 changed files with 178 additions and 0 deletions
@@ -74,6 +74,8 @@ pub mod stx;
 pub mod sty;
 pub mod stp;
 pub mod stz;
+pub mod tax;
+pub mod tay;
 pub mod bit_common;
 pub mod dec_common;
 pub mod decoder_common;
@@ -0,0 +1,88 @@
+use crate::cpu::cycles;
+use crate::cpu::{bus::Bus, registers::Registers};
+
+use super::{CPUInstruction, Decode};
+use super::decoder_common;
+
+static INSTR_NAME: &'static str = "TAX";
+
+pub struct TAX8 {}
+
+impl CPUInstruction for TAX8 {
+    fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
+        let result = registers.a as u8;
+        registers.set_low_x(result);
+        registers.set_negative_flag((result >> 7) == 1);
+        registers.set_zero_flag(result == 0);
+        let (bytes, cycles) = cycles::increment_cycles_transfer();
+        registers.increment_pc(bytes); registers.cycles += cycles;
+    }
+}
+
+impl Decode for TAX8 {
+    fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
+        decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
+    }
+}
+
+pub struct TAX16 {}
+
+impl CPUInstruction for TAX16 {
+    fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
+        registers.x = registers.a;
+        registers.set_negative_flag((registers.x >> 15) == 1);
+        registers.set_zero_flag(registers.x == 0);
+        let (bytes, cycles) = cycles::increment_cycles_transfer();
+        registers.increment_pc(bytes); registers.cycles += cycles;
+    }
+}
+
+impl Decode for TAX16 {
+    fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
+        decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
+    }
+}
+
+
+#[cfg(test)]
+mod cpu_instructions_tests {
+    use super::*;
+
+    #[test]
+    fn test_8bit() {
+        let mut registers = Registers::new();
+        let mut bus = Bus::new();
+        registers.emulation_mode = false;
+        registers.pc = 0x0000;
+        registers.a = 0xFFFF;
+        registers.x = 0x0000;
+        registers.set_16bit_mode(false);
+        registers.set_16bit_index(false);
+        let instruction = TAX8{};
+        instruction.execute(&mut registers, &mut bus);
+        assert_eq!(registers.get_negative_flag(), true);
+        assert_eq!(registers.get_zero_flag(), false);
+        assert_eq!(registers.x, 0x00FF);
+        assert_eq!(registers.pc, 0x0001);
+        assert_eq!(registers.cycles, 2);
+    }
+
+    #[test]
+    fn test_16bit() {
+        let mut registers = Registers::new();
+        let mut bus = Bus::new();
+        registers.emulation_mode = false;
+        registers.pc = 0x0000;
+        registers.a = 0xF0F0;
+        registers.x = 0x0000;
+        registers.set_16bit_mode(true);
+        registers.set_16bit_index(true);
+        let instruction = TAX16{};
+        instruction.execute(&mut registers, &mut bus);
+        assert_eq!(registers.get_negative_flag(), true);
+        assert_eq!(registers.get_zero_flag(), false);
+        assert_eq!(registers.x, 0xF0F0);
+        assert_eq!(registers.pc, 0x0001);
+        assert_eq!(registers.cycles, 2);
+    }
+}
@@ -0,0 +1,88 @@
+use crate::cpu::cycles;
+use crate::cpu::{bus::Bus, registers::Registers};
+
+use super::{CPUInstruction, Decode};
+use super::decoder_common;
+
+static INSTR_NAME: &'static str = "TAY";
+
+pub struct TAY8 {}
+
+impl CPUInstruction for TAY8 {
+    fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
+        let result = registers.a as u8;
+        registers.set_low_y(result);
+        registers.set_negative_flag((result >> 7) == 1);
+        registers.set_zero_flag(result == 0);
+        let (bytes, cycles) = cycles::increment_cycles_transfer();
+        registers.increment_pc(bytes); registers.cycles += cycles;
+    }
+}
+
+impl Decode for TAY8 {
+    fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
+        decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
+    }
+}
+
+pub struct TAY16 {}
+
+impl CPUInstruction for TAY16 {
+    fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
+        registers.y = registers.a;
+        registers.set_negative_flag((registers.y >> 15) == 1);
+        registers.set_zero_flag(registers.y == 0);
+        let (bytes, cycles) = cycles::increment_cycles_transfer();
+        registers.increment_pc(bytes); registers.cycles += cycles;
+    }
+}
+
+impl Decode for TAY16 {
+    fn mnemonic(&self, _registers: &Registers, _bus: &Bus, opcode: u8) -> String {
+        decoder_common::mnemonic_single_byte_instr(opcode, INSTR_NAME)
+    }
+}
+
+
+#[cfg(test)]
+mod cpu_instructions_tests {
+    use super::*;
+
+    #[test]
+    fn test_8bit() {
+        let mut registers = Registers::new();
+        let mut bus = Bus::new();
+        registers.emulation_mode = false;
+        registers.pc = 0x0000;
+        registers.a = 0xFFFF;
+        registers.y = 0x0000;
+        registers.set_16bit_mode(false);
+        registers.set_16bit_index(false);
+        let instruction = TAY8{};
+        instruction.execute(&mut registers, &mut bus);
+        assert_eq!(registers.get_negative_flag(), true);
+        assert_eq!(registers.get_zero_flag(), false);
+        assert_eq!(registers.y, 0x00FF);
+        assert_eq!(registers.pc, 0x0001);
+        assert_eq!(registers.cycles, 2);
+    }
+
+    #[test]
+    fn test_16bit() {
+        let mut registers = Registers::new();
+        let mut bus = Bus::new();
+        registers.emulation_mode = false;
+        registers.pc = 0x0000;
+        registers.a = 0xF0F0;
+        registers.y = 0x0000;
+        registers.set_16bit_mode(true);
+        registers.set_16bit_index(true);
+        let instruction = TAY16{};
+        instruction.execute(&mut registers, &mut bus);
+        assert_eq!(registers.get_negative_flag(), true);
+        assert_eq!(registers.get_zero_flag(), false);
+        assert_eq!(registers.y, 0xF0F0);
+        assert_eq!(registers.pc, 0x0001);
+        assert_eq!(registers.cycles, 2);
+    }
+}