mirror of
https://github.com/FranLMSP/snes.git
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common decoding module
This commit is contained in:
@@ -2,106 +2,103 @@ use crate::{cpu::{bus::Bus, registers::Registers}, utils::{alu, addressing::Addr
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use crate::cpu::cycles;
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use crate::cpu::cycles;
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use super::{CPUInstruction, Decode, read_8bit_from_address, read_16bit_from_address};
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use super::{CPUInstruction, Decode, read_8bit_from_address, read_16bit_from_address};
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use super::decoder_common;
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pub const OPCODE: u8 = 0x69;
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static INSTR_NAME: &'static str = "ADC";
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fn mnemonic_8bit(registers: &Registers, bus: &Bus) -> String {
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pub struct ADC8BIN {
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let next_byte = bus.read_external(registers.get_pc_address() + 1);
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addressing_mode: AddressingMode,
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format!("{:02X} {:02X} __ __ | ADC #${:02X}", OPCODE, next_byte, next_byte)
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}
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}
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fn mnemonic_16bit(registers: &Registers, bus: &Bus) -> String {
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let next_byte = bus.read_external(registers.get_pc_address() + 1);
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let next_second_byte = bus.read_external(registers.get_pc_address() + 2);
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let word = (next_byte as u16) | ((next_byte as u16) << 8);
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format!("{:02X} {:02X} {:02X} __ | ADC #${:04X}", OPCODE, next_byte, next_second_byte, word)
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}
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pub struct ADC8BIN {}
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impl CPUInstruction for ADC8BIN {
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impl CPUInstruction for ADC8BIN {
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fn execute(&self, registers: &mut Registers, bus: &mut Bus, addressing_mode: AddressingMode) {
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fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
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let (result, affected_flags) = alu::adc_bin(
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let (result, affected_flags) = alu::adc_bin(
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registers.a as u8,
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registers.a as u8,
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read_8bit_from_address(registers, bus, addressing_mode),
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read_8bit_from_address(registers, bus, self.addressing_mode),
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registers.get_carry_flag(),
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registers.get_carry_flag(),
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);
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);
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registers.set_low_a(result);
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registers.set_low_a(result);
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registers.set_flags(&affected_flags);
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registers.set_flags(&affected_flags);
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let (bytes, cycles) = cycles::increment_cycles_arithmetic(®isters, addressing_mode);
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let (bytes, cycles) = cycles::increment_cycles_arithmetic(®isters, self.addressing_mode);
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registers.increment_pc(bytes); registers.cycles += cycles;
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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}
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}
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impl Decode for ADC8BIN {
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impl Decode for ADC8BIN {
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fn mnemonic(&self, registers: &Registers, bus: &Bus) -> String {
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fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
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mnemonic_8bit(registers, bus)
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decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
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}
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}
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}
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}
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pub struct ADC16BIN {}
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pub struct ADC16BIN {
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addressing_mode: AddressingMode,
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}
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impl CPUInstruction for ADC16BIN {
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impl CPUInstruction for ADC16BIN {
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fn execute(&self, registers: &mut Registers, bus: &mut Bus, addressing_mode: AddressingMode) {
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fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
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let (result, affected_flags) = alu::adc_bin(
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let (result, affected_flags) = alu::adc_bin(
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registers.a,
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registers.a,
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read_16bit_from_address(registers, bus, addressing_mode),
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read_16bit_from_address(registers, bus, self.addressing_mode),
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registers.get_carry_flag(),
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registers.get_carry_flag(),
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);
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);
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registers.a = result;
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registers.a = result;
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registers.set_flags(&affected_flags);
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registers.set_flags(&affected_flags);
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let (bytes, cycles) = cycles::increment_cycles_arithmetic(®isters, addressing_mode);
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let (bytes, cycles) = cycles::increment_cycles_arithmetic(®isters, self.addressing_mode);
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registers.increment_pc(bytes); registers.cycles += cycles;
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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}
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}
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impl Decode for ADC16BIN {
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impl Decode for ADC16BIN {
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fn mnemonic(&self, registers: &Registers, bus: &Bus) -> String {
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fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
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mnemonic_16bit(registers, bus)
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decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
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}
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}
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}
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}
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pub struct ADC8BCD {}
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pub struct ADC8BCD {
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addressing_mode: AddressingMode,
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}
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impl CPUInstruction for ADC8BCD {
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impl CPUInstruction for ADC8BCD {
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fn execute(&self, registers: &mut Registers, bus: &mut Bus, addressing_mode: AddressingMode) {
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fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
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let (result, affected_flags) = alu::adc_bcd(
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let (result, affected_flags) = alu::adc_bcd(
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registers.a as u8,
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registers.a as u8,
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read_8bit_from_address(registers, bus, addressing_mode),
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read_8bit_from_address(registers, bus, self.addressing_mode),
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registers.get_carry_flag(),
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registers.get_carry_flag(),
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);
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);
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registers.set_low_a(result);
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registers.set_low_a(result);
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registers.set_flags(&affected_flags);
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registers.set_flags(&affected_flags);
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let (bytes, cycles) = cycles::increment_cycles_arithmetic(®isters, addressing_mode);
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let (bytes, cycles) = cycles::increment_cycles_arithmetic(®isters, self.addressing_mode);
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registers.increment_pc(bytes); registers.cycles += cycles;
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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}
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}
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impl Decode for ADC8BCD {
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impl Decode for ADC8BCD {
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fn mnemonic(&self, registers: &Registers, bus: &Bus) -> String {
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fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
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mnemonic_8bit(registers, bus)
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decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
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}
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}
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}
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}
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pub struct ADC16BCD {}
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pub struct ADC16BCD {
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addressing_mode: AddressingMode,
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}
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impl CPUInstruction for ADC16BCD {
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impl CPUInstruction for ADC16BCD {
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fn execute(&self, registers: &mut Registers, bus: &mut Bus, addressing_mode: AddressingMode) {
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fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
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let (result, affected_flags) = alu::adc_bcd(
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let (result, affected_flags) = alu::adc_bcd(
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registers.a,
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registers.a,
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read_16bit_from_address(registers, bus, addressing_mode),
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read_16bit_from_address(registers, bus, self.addressing_mode),
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registers.get_carry_flag(),
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registers.get_carry_flag(),
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);
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);
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registers.a = result;
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registers.a = result;
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registers.set_flags(&affected_flags);
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registers.set_flags(&affected_flags);
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let (bytes, cycles) = cycles::increment_cycles_arithmetic(®isters, addressing_mode);
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let (bytes, cycles) = cycles::increment_cycles_arithmetic(®isters, self.addressing_mode);
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registers.increment_pc(bytes); registers.cycles += cycles;
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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}
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}
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impl Decode for ADC16BCD {
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impl Decode for ADC16BCD {
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fn mnemonic(&self, registers: &Registers, bus: &Bus) -> String {
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fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
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mnemonic_16bit(registers, bus)
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decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
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}
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}
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}
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}
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@@ -120,8 +117,8 @@ mod cpu_instructions_tests {
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registers.pc = 0x0000;
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registers.pc = 0x0000;
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registers.set_memory_select_flag(true);
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registers.set_memory_select_flag(true);
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bus.write(0x000001, 0x40);
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bus.write(0x000001, 0x40);
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let instruction = ADC8BIN{};
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let instruction = ADC8BIN{addressing_mode: AddressingMode::Immediate};
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instruction.execute(&mut registers, &mut bus, AddressingMode::Immediate);
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.a, 0x40);
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assert_eq!(registers.a, 0x40);
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assert_eq!(registers.pc, 0x02);
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assert_eq!(registers.pc, 0x02);
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assert_eq!(registers.cycles, 2);
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assert_eq!(registers.cycles, 2);
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@@ -139,8 +136,8 @@ mod cpu_instructions_tests {
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registers.set_memory_select_flag(false);
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registers.set_memory_select_flag(false);
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bus.write(0x000001, 0x00);
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bus.write(0x000001, 0x00);
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bus.write(0x000002, 0x40);
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bus.write(0x000002, 0x40);
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let instruction = ADC16BIN{};
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let instruction = ADC16BIN{addressing_mode: AddressingMode::Immediate};
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instruction.execute(&mut registers, &mut bus, AddressingMode::Immediate);
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.a, 0x4000);
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assert_eq!(registers.a, 0x4000);
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assert_eq!(registers.pc, 0x03);
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assert_eq!(registers.pc, 0x03);
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assert_eq!(registers.cycles, 3);
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assert_eq!(registers.cycles, 3);
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@@ -157,8 +154,8 @@ mod cpu_instructions_tests {
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registers.pc = 0x0000;
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registers.pc = 0x0000;
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registers.set_memory_select_flag(true);
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registers.set_memory_select_flag(true);
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bus.write(0x000001, 0x40);
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bus.write(0x000001, 0x40);
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let instruction = ADC8BCD{};
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let instruction = ADC8BCD{addressing_mode: AddressingMode::Immediate};
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instruction.execute(&mut registers, &mut bus, AddressingMode::Immediate);
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.a, 0x40);
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assert_eq!(registers.a, 0x40);
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assert_eq!(registers.pc, 0x02);
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assert_eq!(registers.pc, 0x02);
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assert_eq!(registers.cycles, 2);
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assert_eq!(registers.cycles, 2);
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@@ -176,8 +173,8 @@ mod cpu_instructions_tests {
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registers.set_memory_select_flag(false);
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registers.set_memory_select_flag(false);
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bus.write(0x000001, 0x00);
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bus.write(0x000001, 0x00);
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bus.write(0x000002, 0x40);
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bus.write(0x000002, 0x40);
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let instruction = ADC16BCD{};
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let instruction = ADC16BCD{addressing_mode: AddressingMode::Immediate};
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instruction.execute(&mut registers, &mut bus, AddressingMode::Immediate);
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.a, 0x4000);
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assert_eq!(registers.a, 0x4000);
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assert_eq!(registers.pc, 0x03);
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assert_eq!(registers.pc, 0x03);
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assert_eq!(registers.cycles, 3);
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assert_eq!(registers.cycles, 3);
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@@ -2,60 +2,53 @@ use crate::{cpu::{bus::Bus, registers::Registers}, utils::{alu, addressing::Addr
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use crate::cpu::cycles;
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use crate::cpu::cycles;
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use super::{CPUInstruction, Decode, read_8bit_from_address, read_16bit_from_address};
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use super::{CPUInstruction, Decode, read_8bit_from_address, read_16bit_from_address};
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use super::decoder_common;
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pub const OPCODE: u8 = 0x29;
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static INSTR_NAME: &'static str = "AND";
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fn mnemonic_8bit(registers: &Registers, bus: &Bus) -> String {
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pub struct AND8 {
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let next_byte = bus.read_external(registers.get_pc_address() + 1);
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addressing_mode: AddressingMode,
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format!("{:02X} {:02X} __ __ | AND #${:02X}", OPCODE, next_byte, next_byte)
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}
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}
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fn mnemonic_16bit(registers: &Registers, bus: &Bus) -> String {
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let next_byte = bus.read_external(registers.get_pc_address() + 1);
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let next_second_byte = bus.read_external(registers.get_pc_address() + 2);
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let word = (next_byte as u16) | ((next_byte as u16) << 8);
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format!("{:02X} {:02X} {:02X} __ | AND #${:04X}", OPCODE, next_byte, next_second_byte, word)
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}
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pub struct AND8 {}
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impl CPUInstruction for AND8 {
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impl CPUInstruction for AND8 {
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fn execute(&self, registers: &mut Registers, bus: &mut Bus, addressing_mode: AddressingMode) {
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fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
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let (result, affected_flags) = alu::and(
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let (result, affected_flags) = alu::and(
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registers.a as u8,
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registers.a as u8,
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read_8bit_from_address(registers, bus, addressing_mode),
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read_8bit_from_address(registers, bus, self.addressing_mode),
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);
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);
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registers.set_low_a(result);
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registers.set_low_a(result);
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registers.set_flags(&affected_flags);
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registers.set_flags(&affected_flags);
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let (bytes, cycles) = cycles::increment_cycles_bitwise(®isters, addressing_mode);
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let (bytes, cycles) = cycles::increment_cycles_bitwise(®isters, self.addressing_mode);
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registers.increment_pc(bytes); registers.cycles += cycles;
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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}
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}
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impl Decode for AND8 {
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impl Decode for AND8 {
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fn mnemonic(&self, registers: &Registers, bus: &Bus) -> String {
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fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
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mnemonic_8bit(registers, bus)
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decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
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}
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}
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}
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}
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pub struct AND16 {}
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pub struct AND16 {
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addressing_mode: AddressingMode,
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}
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impl CPUInstruction for AND16 {
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impl CPUInstruction for AND16 {
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fn execute(&self, registers: &mut Registers, bus: &mut Bus, addressing_mode: AddressingMode) {
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fn execute(&self, registers: &mut Registers, bus: &mut Bus) {
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let (result, affected_flags) = alu::and(
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let (result, affected_flags) = alu::and(
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registers.a,
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registers.a,
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read_16bit_from_address(registers, bus, addressing_mode),
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read_16bit_from_address(registers, bus, self.addressing_mode),
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);
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);
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registers.a = result;
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registers.a = result;
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registers.set_flags(&affected_flags);
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registers.set_flags(&affected_flags);
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let (bytes, cycles) = cycles::increment_cycles_bitwise(®isters, addressing_mode);
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let (bytes, cycles) = cycles::increment_cycles_bitwise(®isters, self.addressing_mode);
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registers.increment_pc(bytes); registers.cycles += cycles;
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registers.increment_pc(bytes); registers.cycles += cycles;
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}
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}
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}
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}
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impl Decode for AND16 {
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impl Decode for AND16 {
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fn mnemonic(&self, registers: &Registers, bus: &Bus) -> String {
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fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
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mnemonic_16bit(registers, bus)
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decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
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}
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}
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}
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}
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@@ -74,8 +67,8 @@ mod cpu_instructions_tests {
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registers.pc = 0x0000;
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registers.pc = 0x0000;
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registers.set_memory_select_flag(true);
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registers.set_memory_select_flag(true);
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bus.write(0x000001, 0x00);
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bus.write(0x000001, 0x00);
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let instruction = AND8{};
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let instruction = AND8{addressing_mode: AddressingMode::Immediate};
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instruction.execute(&mut registers, &mut bus, AddressingMode::Immediate);
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.a, 0x0100);
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assert_eq!(registers.a, 0x0100);
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assert_eq!(registers.pc, 0x02);
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assert_eq!(registers.pc, 0x02);
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assert_eq!(registers.cycles, 2);
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assert_eq!(registers.cycles, 2);
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@@ -94,8 +87,8 @@ mod cpu_instructions_tests {
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registers.set_memory_select_flag(false);
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registers.set_memory_select_flag(false);
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bus.write(0x000001, 0x01);
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bus.write(0x000001, 0x01);
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bus.write(0x000002, 0x01);
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bus.write(0x000002, 0x01);
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let instruction = AND16{};
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let instruction = AND16{addressing_mode: AddressingMode::Immediate};
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instruction.execute(&mut registers, &mut bus, AddressingMode::Immediate);
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instruction.execute(&mut registers, &mut bus);
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assert_eq!(registers.a, 0x0101);
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assert_eq!(registers.a, 0x0101);
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assert_eq!(registers.pc, 0x03);
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assert_eq!(registers.pc, 0x03);
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assert_eq!(registers.cycles, 3);
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assert_eq!(registers.cycles, 3);
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@@ -2,58 +2,51 @@ use crate::{cpu::{bus::Bus, registers::Registers}, utils::{alu, addressing::Addr
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|
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use crate::cpu::cycles;
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use crate::cpu::cycles;
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use super::{CPUInstruction, Decode};
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use super::{CPUInstruction, Decode};
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use super::decoder_common;
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|
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pub const OPCODE: u8 = 0x0A;
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static INSTR_NAME: &'static str = "ASL";
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fn mnemonic_8bit(registers: &Registers, bus: &Bus) -> String {
|
pub struct ASL8 {
|
||||||
let next_byte = bus.read_external(registers.get_pc_address() + 1);
|
addressing_mode: AddressingMode,
|
||||||
format!("{:02X} {:02X} __ __ | ASL #${:02X}", OPCODE, next_byte, next_byte)
|
|
||||||
}
|
}
|
||||||
|
|
||||||
fn mnemonic_16bit(registers: &Registers, bus: &Bus) -> String {
|
|
||||||
let next_byte = bus.read_external(registers.get_pc_address() + 1);
|
|
||||||
let next_second_byte = bus.read_external(registers.get_pc_address() + 2);
|
|
||||||
let word = (next_byte as u16) | ((next_byte as u16) << 8);
|
|
||||||
format!("{:02X} {:02X} {:02X} __ | AND #${:04X}", OPCODE, next_byte, next_second_byte, word)
|
|
||||||
}
|
|
||||||
|
|
||||||
pub struct ASL8 {}
|
|
||||||
|
|
||||||
impl CPUInstruction for ASL8 {
|
impl CPUInstruction for ASL8 {
|
||||||
fn execute(&self, registers: &mut Registers, _bus: &mut Bus, addressing_mode: AddressingMode) {
|
fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
|
||||||
let (result, affected_flags) = alu::asl(
|
let (result, affected_flags) = alu::asl(
|
||||||
registers.a as u8,
|
registers.a as u8,
|
||||||
);
|
);
|
||||||
registers.set_low_a(result);
|
registers.set_low_a(result);
|
||||||
registers.set_flags(&affected_flags);
|
registers.set_flags(&affected_flags);
|
||||||
let (bytes, cycles) = cycles::increment_cycles_bitwise(®isters, addressing_mode);
|
let (bytes, cycles) = cycles::increment_cycles_bitwise(®isters, self.addressing_mode);
|
||||||
registers.increment_pc(bytes); registers.cycles += cycles;
|
registers.increment_pc(bytes); registers.cycles += cycles;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl Decode for ASL8 {
|
impl Decode for ASL8 {
|
||||||
fn mnemonic(&self, registers: &Registers, bus: &Bus) -> String {
|
fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
|
||||||
mnemonic_8bit(registers, bus)
|
decoder_common::mnemonic_arithmetic(false, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
pub struct ASL16 {}
|
pub struct ASL16 {
|
||||||
|
addressing_mode: AddressingMode,
|
||||||
|
}
|
||||||
|
|
||||||
impl CPUInstruction for ASL16 {
|
impl CPUInstruction for ASL16 {
|
||||||
fn execute(&self, registers: &mut Registers, _bus: &mut Bus, addressing_mode: AddressingMode) {
|
fn execute(&self, registers: &mut Registers, _bus: &mut Bus) {
|
||||||
let (result, affected_flags) = alu::asl(
|
let (result, affected_flags) = alu::asl(
|
||||||
registers.a,
|
registers.a,
|
||||||
);
|
);
|
||||||
registers.a = result;
|
registers.a = result;
|
||||||
registers.set_flags(&affected_flags);
|
registers.set_flags(&affected_flags);
|
||||||
let (bytes, cycles) = cycles::increment_cycles_bitwise(®isters, addressing_mode);
|
let (bytes, cycles) = cycles::increment_cycles_bitwise(®isters, self.addressing_mode);
|
||||||
registers.increment_pc(bytes); registers.cycles += cycles;
|
registers.increment_pc(bytes); registers.cycles += cycles;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl Decode for ASL16 {
|
impl Decode for ASL16 {
|
||||||
fn mnemonic(&self, registers: &Registers, bus: &Bus) -> String {
|
fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String {
|
||||||
mnemonic_16bit(registers, bus)
|
decoder_common::mnemonic_arithmetic(true, opcode, INSTR_NAME, self.addressing_mode, registers, bus)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -71,8 +64,8 @@ mod cpu_instructions_tests {
|
|||||||
registers.pbr = 0x00;
|
registers.pbr = 0x00;
|
||||||
registers.pc = 0x0000;
|
registers.pc = 0x0000;
|
||||||
registers.set_memory_select_flag(true);
|
registers.set_memory_select_flag(true);
|
||||||
let instruction = ASL8{};
|
let instruction = ASL8{addressing_mode: AddressingMode::Immediate};
|
||||||
instruction.execute(&mut registers, &mut bus, AddressingMode::Immediate);
|
instruction.execute(&mut registers, &mut bus);
|
||||||
assert_eq!(registers.a, 0b10100000);
|
assert_eq!(registers.a, 0b10100000);
|
||||||
assert_eq!(registers.pc, 0x02);
|
assert_eq!(registers.pc, 0x02);
|
||||||
assert_eq!(registers.cycles, 2);
|
assert_eq!(registers.cycles, 2);
|
||||||
@@ -90,8 +83,8 @@ mod cpu_instructions_tests {
|
|||||||
registers.pbr = 0x00;
|
registers.pbr = 0x00;
|
||||||
registers.pc = 0x0000;
|
registers.pc = 0x0000;
|
||||||
registers.set_memory_select_flag(false);
|
registers.set_memory_select_flag(false);
|
||||||
let instruction = ASL16{};
|
let instruction = ASL16{addressing_mode: AddressingMode::Immediate};
|
||||||
instruction.execute(&mut registers, &mut bus, AddressingMode::Immediate);
|
instruction.execute(&mut registers, &mut bus);
|
||||||
assert_eq!(registers.a, 0b10100000_00000000);
|
assert_eq!(registers.a, 0b10100000_00000000);
|
||||||
assert_eq!(registers.pc, 0x03);
|
assert_eq!(registers.pc, 0x03);
|
||||||
assert_eq!(registers.cycles, 3);
|
assert_eq!(registers.cycles, 3);
|
||||||
|
|||||||
@@ -0,0 +1,113 @@
|
|||||||
|
use crate::cpu::registers::Registers;
|
||||||
|
use crate::cpu::bus::Bus;
|
||||||
|
use crate::utils::addressing::{IndexRegister, AddressingMode};
|
||||||
|
|
||||||
|
pub fn mnemonic_arithmetic(is_16bit: bool, opcode: u8, instr_name: &str, addressing_mode: AddressingMode, registers: &Registers, bus: &Bus) -> String {
|
||||||
|
type A = AddressingMode;
|
||||||
|
match addressing_mode {
|
||||||
|
A::Accumulator => mnemonic_accumulator(opcode, instr_name),
|
||||||
|
A::Immediate => match is_16bit {
|
||||||
|
true => mnemonic_16bit_immediate(opcode, instr_name, registers, bus),
|
||||||
|
false => mnemonic_8bit_immediate(opcode, instr_name, registers, bus),
|
||||||
|
},
|
||||||
|
A::Absolute => mnemonic_absolute(opcode, instr_name, registers, bus),
|
||||||
|
A::AbsoluteLong => mnemonic_absolute_long(opcode, instr_name, registers, bus),
|
||||||
|
A::DirectPage => mnemonic_direct_page(opcode, instr_name, registers, bus),
|
||||||
|
A::DirectPageIndirect => mnemonic_direct_page_indirect(opcode, instr_name, registers, bus),
|
||||||
|
A::DirectPageIndirectLong => mnemonic_direct_page_indirect_long(opcode, instr_name, registers, bus),
|
||||||
|
A::AbsoluteIndexed(idx) => mnemonic_absolute_indexed(opcode, instr_name, idx, registers, bus),
|
||||||
|
A::AbsoluteLongIndexed(idx) => mnemonic_absolute_long_indexed(opcode, instr_name, idx, registers, bus),
|
||||||
|
A::DirectPageIndexed(idx) => mnemonic_direct_page_indexed(opcode, instr_name, idx, registers, bus),
|
||||||
|
A::DirectPageIndexedIndirect(idx) => mnemonic_direct_page_indexed_indirect(opcode, instr_name, idx, registers, bus),
|
||||||
|
A::DirectPageIndirectLongIndexed(idx) => mnemonic_direct_page_indirect_long_indexed(opcode, instr_name, idx, registers, bus),
|
||||||
|
A::StackRelative => mnemonic_stack_relative(opcode, instr_name, registers, bus),
|
||||||
|
A::StackRelativeIndirectIndexed(idx)=> mnemonic_stack_relative_indirect_indexed(opcode, instr_name, idx, registers, bus),
|
||||||
|
_ => unreachable!(),
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn mnemonic_accumulator(opcode: u8, instr_name: &str) -> String {
|
||||||
|
format!("{:02X} __ __ __ | {} A", opcode, instr_name)
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn mnemonic_8bit_immediate(opcode: u8, instr_name: &str, registers: &Registers, bus: &Bus) -> String {
|
||||||
|
let next_byte = bus.read_external(registers.get_pc_address() + 1);
|
||||||
|
format!("{:02X} {:02X} __ __ | {} #${:04X}", opcode, next_byte, instr_name, next_byte)
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn mnemonic_16bit_immediate(opcode: u8, instr_name: &str, registers: &Registers, bus: &Bus) -> String {
|
||||||
|
let next_byte = bus.read_external(registers.get_pc_address() + 1);
|
||||||
|
let next_second_byte = bus.read_external(registers.get_pc_address() + 2);
|
||||||
|
let word = (next_byte as u16) | ((next_byte as u16) << 8);
|
||||||
|
format!("{:02X} {:02X} {:02X} __ | {} #${:04X}", opcode, next_byte, next_second_byte, instr_name, word)
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn mnemonic_absolute(opcode: u8, instr_name: &str, registers: &Registers, bus: &Bus) -> String {
|
||||||
|
let next_byte = bus.read_external(registers.get_pc_address() + 1);
|
||||||
|
let next_second_byte = bus.read_external(registers.get_pc_address() + 2);
|
||||||
|
let word = (next_byte as u16) | ((next_byte as u16) << 8);
|
||||||
|
format!("{:02X} {:02X} {:02X} __ | {} ${:04X}", opcode, next_byte, next_second_byte, instr_name, word)
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn mnemonic_absolute_long(opcode: u8, instr_name: &str, registers: &Registers, bus: &Bus) -> String {
|
||||||
|
let next_byte = bus.read_external(registers.get_pc_address() + 1);
|
||||||
|
let next_second_byte = bus.read_external(registers.get_pc_address() + 2);
|
||||||
|
let next_third_byte = bus.read_external(registers.get_pc_address() + 3);
|
||||||
|
let word_long = (next_byte as u32) | ((next_second_byte as u32) << 8) | ((next_third_byte as u32) << 16);
|
||||||
|
format!("{:02X} {:02X} {:02X} {:02X} | {} ${:06X}", opcode, next_byte, next_second_byte, next_third_byte, instr_name, word_long)
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn mnemonic_direct_page(opcode: u8, instr_name: &str, registers: &Registers, bus: &Bus) -> String {
|
||||||
|
let next_byte = bus.read_external(registers.get_pc_address() + 1);
|
||||||
|
format!("{:02X} {:02X} __ __ | {} ${:02X} | dp", opcode, next_byte, instr_name, next_byte)
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn mnemonic_direct_page_indirect(opcode: u8, instr_name: &str, registers: &Registers, bus: &Bus) -> String {
|
||||||
|
let next_byte = bus.read_external(registers.get_pc_address() + 1);
|
||||||
|
format!("{:02X} {:02X} __ __ | {} (${:02X})", opcode, next_byte, instr_name, next_byte)
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn mnemonic_direct_page_indirect_long(opcode: u8, instr_name: &str, registers: &Registers, bus: &Bus) -> String {
|
||||||
|
let next_byte = bus.read_external(registers.get_pc_address() + 1);
|
||||||
|
format!("{:02X} {:02X} __ __ | {} [${:02X}]", opcode, next_byte, instr_name, next_byte)
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn mnemonic_absolute_indexed(opcode: u8, instr_name: &str, index: IndexRegister, registers: &Registers, bus: &Bus) -> String {
|
||||||
|
let next_byte = bus.read_external(registers.get_pc_address() + 1);
|
||||||
|
let next_second_byte = bus.read_external(registers.get_pc_address() + 2);
|
||||||
|
let word = (next_byte as u16) | ((next_byte as u16) << 8);
|
||||||
|
format!("{:02X} {:02X} {:02X} __ | {} ${:04X}, {}", opcode, next_byte, next_second_byte, instr_name, word, index)
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn mnemonic_absolute_long_indexed(opcode: u8, instr_name: &str, index: IndexRegister, registers: &Registers, bus: &Bus) -> String {
|
||||||
|
let next_byte = bus.read_external(registers.get_pc_address() + 1);
|
||||||
|
let next_second_byte = bus.read_external(registers.get_pc_address() + 2);
|
||||||
|
let next_third_byte = bus.read_external(registers.get_pc_address() + 3);
|
||||||
|
let word_long = (next_byte as u32) | ((next_second_byte as u32) << 8) | ((next_third_byte as u32) << 16);
|
||||||
|
format!("{:02X} {:02X} {:02X} {:02X} | {} ${:06X}, {}", opcode, next_byte, next_second_byte, next_third_byte, instr_name, word_long, index)
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn mnemonic_direct_page_indexed(opcode: u8, instr_name: &str, index: IndexRegister, registers: &Registers, bus: &Bus) -> String {
|
||||||
|
let next_byte = bus.read_external(registers.get_pc_address() + 1);
|
||||||
|
format!("{:02X} {:02X} __ __ | {} ${:02X}, {} | dp", opcode, next_byte, instr_name, next_byte, index)
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn mnemonic_direct_page_indexed_indirect(opcode: u8, instr_name: &str, index: IndexRegister, registers: &Registers, bus: &Bus) -> String {
|
||||||
|
let next_byte = bus.read_external(registers.get_pc_address() + 1);
|
||||||
|
format!("{:02X} {:02X} __ __ | {} (${:02X}, {}) | dp", opcode, next_byte, instr_name, next_byte, index)
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn mnemonic_direct_page_indirect_long_indexed(opcode: u8, instr_name: &str, index: IndexRegister, registers: &Registers, bus: &Bus) -> String {
|
||||||
|
let next_byte = bus.read_external(registers.get_pc_address() + 1);
|
||||||
|
format!("{:02X} {:02X} __ __ | {} [${:02X}], {} | dp", opcode, next_byte, instr_name, next_byte, index)
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn mnemonic_stack_relative(opcode: u8, instr_name: &str, registers: &Registers, bus: &Bus) -> String {
|
||||||
|
let next_byte = bus.read_external(registers.get_pc_address() + 1);
|
||||||
|
format!("{:02X} {:02X} __ __ | {} ${:02X}, S", opcode, next_byte, instr_name, next_byte)
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn mnemonic_stack_relative_indirect_indexed(opcode: u8, instr_name: &str, index: IndexRegister, registers: &Registers, bus: &Bus) -> String {
|
||||||
|
let next_byte = bus.read_external(registers.get_pc_address() + 1);
|
||||||
|
format!("{:02X} {:02X} __ __ | {} (${:02X}, S), {}", opcode, next_byte, instr_name, next_byte, index)
|
||||||
|
}
|
||||||
@@ -5,13 +5,14 @@ use crate::utils::addressing::AddressingMode;
|
|||||||
pub mod adc;
|
pub mod adc;
|
||||||
pub mod and;
|
pub mod and;
|
||||||
pub mod asl;
|
pub mod asl;
|
||||||
|
pub mod decoder_common;
|
||||||
|
|
||||||
pub trait CPUInstruction {
|
pub trait CPUInstruction {
|
||||||
fn execute(&self, registers: &mut Registers, bus: &mut Bus, addressing_mode: AddressingMode);
|
fn execute(&self, registers: &mut Registers, bus: &mut Bus);
|
||||||
}
|
}
|
||||||
|
|
||||||
pub trait Decode {
|
pub trait Decode {
|
||||||
fn mnemonic(&self, registers: &Registers, bus: &Bus) -> String;
|
fn mnemonic(&self, registers: &Registers, bus: &Bus, opcode: u8) -> String;
|
||||||
}
|
}
|
||||||
|
|
||||||
pub fn read_8bit_from_address(registers: &Registers, bus: &mut Bus, addressing_mode: AddressingMode) -> u8 {
|
pub fn read_8bit_from_address(registers: &Registers, bus: &mut Bus, addressing_mode: AddressingMode) -> u8 {
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
use std::fmt::Display;
|
||||||
|
|
||||||
use crate::cpu::bus::Bus;
|
use crate::cpu::bus::Bus;
|
||||||
|
|
||||||
/// OPCODE #const
|
/// OPCODE #const
|
||||||
@@ -114,6 +116,16 @@ pub enum IndexRegister {
|
|||||||
X, Y,
|
X, Y,
|
||||||
}
|
}
|
||||||
|
|
||||||
|
impl Display for IndexRegister {
|
||||||
|
fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
|
||||||
|
let name = match self {
|
||||||
|
IndexRegister::X => "X",
|
||||||
|
IndexRegister::Y => "Y",
|
||||||
|
};
|
||||||
|
write!(f, "{}", name)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
#[derive(Copy, Clone)]
|
#[derive(Copy, Clone)]
|
||||||
pub enum AddressingMode {
|
pub enum AddressingMode {
|
||||||
Accumulator,
|
Accumulator,
|
||||||
|
|||||||
Reference in New Issue
Block a user