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Fix interrupts, implement halt mode and fix IME

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This commit is contained in:
Franco Colmenarez
2021-10-31 07:25:47 -05:00
parent 61db367f31
commit 5723c3b3b6
5 changed files with 112 additions and 66 deletions
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src/bus.rs
+10 -12
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@@ -5,7 +5,7 @@ use crate::utils::{
join_bytes
};
use crate::rom::ROM;
use crate::ppu::{PPU, LCDStatus, LCDStatusModeFlag};
use crate::ppu::{PPU, LCDStatus, LCDStatusModeFlag, LCD_CONTROL_ADDRESS, LCD_Y_ADDRESS};
use crate::cpu::{Interrupt};
use crate::timer::{TIMER_DIVIDER_REGISTER_ADDRESS};
@@ -50,7 +50,7 @@ pub struct Bus {
impl Bus {
pub fn new() -> Self {
let game_rom = match ROM::load_file("ignore/tetris.gb".to_string()) {
let game_rom = match ROM::load_file("ignore/mario-land.gb".to_string()) {
// let game_rom = match ROM::load_file("roms/cpu_instrs.gb".to_string()) {
// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/01-special.gb".to_string()) {
// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/02-interrupts.gb".to_string()) {
@@ -74,14 +74,11 @@ impl Bus {
}
pub fn read(&self, address: u16) -> u8 {
if address == 0xFF00 {
return 0xFF;
}
if BANK_ZERO.in_range(address) || BANK_SWITCHABLE.in_range(address) {
return self.game_rom.read(address);
} else if VIDEO_RAM.in_range(address) {
if PPU::get_lcd_status(self, LCDStatus::ModeFlag(LCDStatusModeFlag::TransferringToLCD)) {
return 0xFF;
}
} else if IO_REGISTERS.in_range(address) {
return self.data[address as usize];
}
self.data[address as usize]
}
@@ -106,10 +103,11 @@ impl Bus {
} else if ECHO_RAM.in_range(address) {
self.data[address as usize] = data;
self.data[(WORK_RAM_1.begin() + (address - ECHO_RAM.begin())) as usize] = data; // Copy to the working RAM
} else if VIDEO_RAM.in_range(address) {
self.data[address as usize] = data;
} else if address == TIMER_DIVIDER_REGISTER_ADDRESS {
self.data[address as usize] = 0x00;
} else if address == LCD_CONTROL_ADDRESS && get_bit(data, BitIndex::I7) {
self.data[address as usize] = data;
self.data[LCD_Y_ADDRESS as usize] = 0x00;
} else {
self.data[address as usize] = data;
}
@@ -121,12 +119,12 @@ impl Bus {
self.write(address.wrapping_add(1), bytes[1]);
}
pub fn set_interrupt_master(&mut self, interrupt: Interrupt, val: bool) {
pub fn set_interrupt_enable(&mut self, interrupt: Interrupt, val: bool) {
let byte = self.read(INTERRUPT_ENABLE_ADDRESS);
self.write(INTERRUPT_ENABLE_ADDRESS, interrupt.set(byte, val));
}
pub fn set_interrupt(&mut self, interrupt: Interrupt, val: bool) {
pub fn set_interrupt_flag(&mut self, interrupt: Interrupt, val: bool) {
let byte = self.read(INTERRUPT_FLAG_ADDRESS);
self.write(INTERRUPT_FLAG_ADDRESS, interrupt.set(byte, val));
}